Inventor

JAUSSI JAMES E

US82 patents

⚠️ This page may combine multiple inventors who share the name “JAUSSI JAMES E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JAUSSI JAMES E

INTEL CORP

Integrated circuit current reference

Differential amplifier offset adjustment

Trimmable bandgap voltage reference

Wireline receiver circuitry having collaborative timing recovery

Filtering variable offset amplifer

Systems, methods, and apparatuses for stacked memory

Providing a consolidated sideband communication channel between devices

Simultaneous transmission and reception of signals in different frequency bands over a bus line

Low power NRZ interconnect for pulsed signaling

Dual-stage comparator unit

Digitally controlled variable offset amplifier

Signal sampling circuits, systems, and methods

Tail current node equalization for a variable offset amplifier

Low-output capacitance, current mode digital-to-analog converter

Active current mirror circuit

Systems, methods, and apparatuses for stacked memory

Providing a consolidated sideband communication channel between devices

Apparatus for distributing a signal

Equalizers and offset control

Method and apparatus to perform on-die waveform capture

Electrostatic discharge protection unit including equalization

Receiver calibration apparatus, method, and system

Discrete-time analog filter

Variable offset amplifier circuits and their applications

Discrete-time analog filter

Wireline receiver circuitry having collaborative timing recovery

Method and apparatus for clock deskew

Pulse amplitude modulated system with reduced intersymbol interference

Calibration of scale factor in adaptive equalizers

Filtering variable offset amplifier

Amplifier apparatus, method, and system

Filtering variable offset amplifier

Memory pass-band signaling

Active cascode differential latch

Analog filter architecture

Sampling pulse generation

A/D signal conversion based on a comparison of voltage-divided signals

Current mirror circuits

Sampling phase detector for delay-locked loop

Frequency-controlled DLL bias

Forwarded clock filtering

Adaptive equalization method and circuit for continuous run-time adaptation

Clock recovery apparatus, method, and system

Pulse amplitude modulated system with reduced intersymbol interference

CASPER BRYAN

Systems, methods, and apparatuses for stacked memory

Systems, methods, and apparatuses for stacked memory

JAUSSI JAMES E

Width scalable connector for high bandwidth IO interfaces

Bandwidth configurable IO connector

HARRIMAN DAVID J

Providing a consolidated sideband communication channel between devices

MOONEY STEPHEN R

Interchangeable power and signal contacts for IO connectors