Inventor

PENNY CHRISTOPHER J

US171 patents

⚠️ This page may combine multiple inventors who share the name “PENNY CHRISTOPHER J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PENNY CHRISTOPHER J

IBM

Self-forming barrier for use in air gap formation

Method for maximizing air gap in back end of the line interconnect through via landing modification

BEOL vertical fuse formed over air gap

Advanced manganese/manganese nitride cap/etch mask for air gap formation scheme in nanocopper low-K interconnect

Air gap semiconductor structure with selective cap bilayer

Fully aligned via with integrated air gaps

Self aligned pattern formation post spacer etchback in tight pitch configurations

Skip-vias bypassing a metallization level at minimum pitch

Air gap and air spacer pinch off

Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs

Airgap protection layer for via alignment

Hybrid airgap structure with oxide liner

Barrier-less prefilled via formation

Method of manufacturing an interconnect without dielectric exclusion zones by thermal decomposition of a sacrificial filler material

Selective dielectric deposition to prevent gouging in MRAM

Self aligned pattern formation post spacer etchback in tight pitch configurations

Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device

Method of manufacturing self-aligned interconnects by deposition of a non-conformal air-gap forming layer having an undulated upper surface

Air gap and air spacer pinch off

Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device

Skip-vias bypassing a metallization level at minimum pitch

Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device

Forming deep airgaps without flop over

Air gap and air spacer pinch off

Heterogeneous metallization using solid diffusion removal of metal interconnects

Method and structure for cut material selection

Hybrid airgap structure with oxide liner

Self aligned conductive lines with relaxed overlay

Method for integrating liner formation in back end of line processing

Method of forming an air gap semiconductor structure with selective cap bilayer

Forming chamferless vias using thermally decomposable porefiller

System and method for performing nano beam diffraction analysis

Top via with damascene line and via

Electrical device having conductive lines with air gaps therebetween and interconnects without exclusion zones

Increasing cost benefit and energy efficiency with modular delivery drones in inclement weather

Conductive lines with subtractive cuts

Well-controlled edge-to-edge spacing between adjacent interconnects

Top via stack

Top via interconnect having a line with a reduced bottom dimension

Top via with next level line selective growth

Top via with hybrid metallization

Interconnect structure having fully aligned vias

TESSERA LLC

Self aligned pattern formation post spacer etchback in tight pitch configurations

Self-forming barrier for use in air gap formation

Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device

TESSERA INC

Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device

Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device

ADEIA SEMICONDUCTOR SOLUTIONS LLC

Selective ILD deposition for fully aligned via with airgap

Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device

YANG CHIH-CHAO

Method of fabricating a profile control in interconnect structures