US11152257B2ActiveUtilityPatentIndex 84
Barrier-less prefilled via formation
Est. expiryJan 16, 2040(~13.5 yrs left)· nominal 20-yr term from priority
Inventors:LANZILLO NICHOLAS ANTHONYSHOBHA HOSADURGAWANG JUNLICLEVENGER LAWRENCE APENNY CHRISTOPHER JROBISON ROBERTHUANG HUAI
H10W 20/4437H10W 20/438H10W 20/435H10W 20/081H10W 20/062H10W 20/057H10W 20/054H10W 20/42H10W 20/037H10W 20/4432H10W 20/4403H10W 20/034H10W 20/085H01L 23/5226H01L 21/7684H01L 23/5283H01L 21/76849H01L 21/76844H01L 21/76802H01L 21/76865H01L 21/76879
84
PatentIndex Score
5
Cited by
17
References
18
Claims
Abstract
A method for fabricating a semiconductor device includes forming one or more layers including at least one of a liner and a barrier along surfaces of a first interlevel dielectric (ILD) layer within a trench, after forming the one or more liners, performing a via etch to form a via opening exposing a first conductive line corresponding to a first metallization level, and forming, within the via opening and on the first conductive line, a barrier-less prefilled via including first conductive material.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A semiconductor device, comprising:
a first conductive line corresponding to a first metallization level;
a first cap layer disposed on the first conductive line;
a first interlevel dielectric (ILD) layer disposed on the first cap layer;
one or more layers including at least one of a liner and a barrier disposed along surfaces of the first ILD layer within a trench formed in the first ILD layer;
a second conductive line corresponding to a second metallization level disposed on the one or more layers;
a barrier-less prefilled via disposed in direct contact with the first and second conductive lines and the first ILD layer;
a second cap layer disposed across the first ILD layer, the one or more layers and the second conductive line; and
a second ILD layer disposed on the second cap layer.
2. The device of claim 1 , wherein the barrier-less prefilled via includes a protrusion extending to a height above a top surface of the one or more layers, the protrusion gouging into the second conductive line to further reduce via resistance.
3. The device of claim 2 , wherein the protrusion has a top with a circular-shaped profile.
4. The device of claim 2 , wherein the protrusion has a top with a conical-shaped profile.
5. The device of claim 2 , wherein the protrusion has a top with a convex-shaped profile.
6. The device of claim 1 , wherein the barrier-less prefilled via has a rectangular-shaped profile.
7. A semiconductor device, comprising:
a first conductive line corresponding to a first metallization level;
a first cap layer disposed on the first conductive line;
a first interlevel dielectric (ILD) layer disposed on the first cap layer;
one or more layers including at least one of a liner and a barrier disposed along surfaces of the first ILD layer within a trench formed in the first ILD layer;
a second conductive line corresponding to a second metallization level disposed on the one or more layers;
a barrier-less prefilled via disposed in direct contact with the first and second conductive lines, with the barrier-less prefilled via having extensions on a top surface of the one or more layers;
a second cap layer disposed across the first ILD layer, the one or more layers and the second conductive line; and
a second ILD layer disposed on the second cap layer.
8. The device of claim 7 , wherein the barrier-less prefilled via has a rectangular-shaped profile.
9. The device of claim 7 , wherein the barrier-less prefilled via includes a protrusion extending to a height above a top surface of the one or more layers, the protrusion gouging into the second conductive line to further reduce via resistance.
10. The device of claim 9 , wherein the protrusion has a top with a circular-shaped profile.
11. The device of claim 9 , wherein the protrusion has a top with a conical-shaped profile.
12. The device of claim 9 , wherein the protrusion has a top with a convex-shaped profile.
13. A semiconductor device, comprising:
a first conductive line corresponding to a first metallization level;
a first cap layer disposed on the first conductive line;
a first interlevel dielectric (ILD) layer disposed on the first cap layer;
one or more layers including at least one of a liner and a barrier disposed along surfaces of the first ILD layer within a trench formed in the first ILD layer;
a second conductive line corresponding to a second metallization level disposed on the one or more layers;
a barrier-less prefilled via disposed in direct contact with the first and second conductive lines, with the barrier-less prefilled via including a protrusion extending to a height above a top surface of the one or more layer;
a second cap layer disposed across the first ILD layer, the one or more layers and the second conductive line; and
a second ILD layer disposed on the second cap layer.
14. The device of claim 13 , wherein the barrier-less prefilled via has a rectangular-shaped profile.
15. The device of claim 13 , wherein the protrusion gouges into the second conductive line to further reduce via resistance.
16. The device of claim 13 , wherein the protrusion has a top with a circular-shaped profile.
17. The device of claim 13 , wherein the protrusion has a top with a conical-shaped profile.
18. The device of claim 13 , wherein the protrusion has a top with a convex-shaped profile.Cited by (0)
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