Inventor
WANG JUNLI
US455 patents
⚠️ This page may combine multiple inventors who share the name “WANG JUNLI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
43 patentsUS10103065B1Oct 16, 2018
Gate metal patterning for tight pitch applications
IBM50 citations98
US9954058B1Apr 24, 2018
Self-aligned air gap spacer for nanosheet CMOS devices
IBM79 citations98
US9871116B2Jan 16, 2018
Replacement metal gate structures
IBM18 citations98
US9735246B1Aug 15, 2017
Air-gap top spacer and self-aligned metal gate for vertical fets
IBM39 citations98
US9666533B1May 30, 2017
Airgap formation between source/drain contacts and gates
IBM54 citations98
US9508825B1Nov 29, 2016
Method and structure for forming gate contact above active area with trench silicide
IBM53 citations98
US9490335B1Nov 8, 2016
Extra gate device for nanosheet
IBM45 citations98
US9685532B2Jun 20, 2017
Replacement metal gate structures
IBM19 citations96
US10566246B1Feb 18, 2020
Shared contact trench comprising dual silicide layers and dual epitaxial layers for source/drain layers of NFET and PFET devices
IBM41 citations95
US10797163B1Oct 6, 2020
Leakage control for gate-all-around field-effect transistor devices
IBM26 citations94
US10516064B1Dec 24, 2019
Multiple width nanosheet devices
IBM21 citations94
US10243043B2Mar 26, 2019
Self-aligned air gap spacer for nanosheet CMOS devices
IBM16 citations94
US10020255B1Jul 10, 2018
Integration of super via structure in BEOL
IBM36 citations94
US10020254B1Jul 10, 2018
Integration of super via structure in BEOL
IBM39 citations94
US9842931B1Dec 12, 2017
Self-aligned shallow trench isolation and doping for vertical fin transistors
IBM33 citations94
US9805935B2Oct 31, 2017
Bottom source/drain silicidation for vertical field-effect transistor (FET)
IBM27 citations94
US9799765B1Oct 24, 2017
Formation of a bottom source-drain for vertical field-effect transistors
IBM28 citations94
US9768118B1Sep 19, 2017
Contact having self-aligned air gap spacers
IBM29 citations94
US9748380B1Aug 29, 2017
Vertical transistor including a bottom source/drain region, a gate structure, and an air gap formed between the bottom source/drain region and the gate structure
IBM32 citations94
US9741792B2Aug 22, 2017
Bulk nanosheet with dielectric isolation
IBM24 citations94
US9653575B1May 16, 2017
Vertical transistor with a body contact for back-biasing
IBM32 citations94
US9576980B1Feb 21, 2017
FinFET devices having gate dielectric structures with different thicknesses on same semiconductor structure
IBM27 citations94
US9570555B1Feb 14, 2017
Source and drain epitaxial semiconductor material integration for high voltage semiconductor devices
IBM22 citations94
US9520392B1Dec 13, 2016
Semiconductor device including finFET and fin varactor
IBM24 citations94
US10283406B2May 7, 2019
Fabrication of self-aligned gate contacts and source/drain contacts directly above gate electrodes and source/drains
IBM12 citations93
US10236359B2Mar 19, 2019
Replacement metal gate structures
IBM8 citations93
US10177256B2Jan 8, 2019
Replacement metal gate structures
IBM9 citations93
US10056489B2Aug 21, 2018
Replacement metal gate structures
IBM8 citations93
US10050121B2Aug 14, 2018
Replacement metal gate structures
IBM6 citations93
US9865739B2Jan 9, 2018
Replacement metal gate structures
IBM12 citations93
US9853127B1Dec 26, 2017
Silicidation of bottom source/drain sheet using pinch-off sacrificial spacer process
IBM18 citations93
US9812567B1Nov 7, 2017
Precise control of vertical transistor gate length
IBM15 citations93
US9704990B1Jul 11, 2017
Vertical FET with strained channel
IBM18 citations93
US9691877B2Jun 27, 2017
Replacement metal gate structures
IBM17 citations93
US9685539B1Jun 20, 2017
Nanowire isolation scheme to reduce parasitic capacitance
IBM17 citations93
US9685507B2Jun 20, 2017
FinFET devices
IBM15 citations93
US9613869B2Apr 4, 2017
FinFET devices
IBM13 citations93
US9570571B1Feb 14, 2017
Gate stack integrated metal resistors
IBM16 citations93
US9508818B1Nov 29, 2016
Method and structure for forming gate contact above active area with trench silicide
IBM16 citations93
US9276013B1Mar 1, 2016
Integrated formation of Si and SiGe fins
IBM21 citations93
US9559014B1Jan 31, 2017
Self-aligned punch through stopper liner for bulk FinFET
IBM20 citations92
US10431495B1Oct 1, 2019
Semiconductor device with local connection
IBM18 citations86
US11164792B2Nov 2, 2021
Complementary field-effect transistors
IBM8 citations84
LEOBANDUNG EFFENDI
1 patentCHENG KANGGUO
1 patentST MICROELECTRONICS INC
1 patentSONY CORP
1 patentWANG JUNLI
1 patentGLOBALFOUNDRIES INC
1 patentTESSERA LLC
1 patentShowing the top 50 of 455 patents by PatentIndex Score.