Inventor

SHEN TZER-MIN

TW43 patents

⚠️ This page may combine multiple inventors who share the name “SHEN TZER-MIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHEN TZER-MIN

TAIWAN SEMICONDUCTOR MFG CO LTD

Integrated circuit structure and method with hybrid orientation for FinFET

Channel strain inducing architecture and doping technique at replacement poly gate (RPG) stage

Memory circuit and write method

Dual channel structure

Effective work function tuning via silicide induced interface dipole modulation for metal gates

Dipoles in semiconductor devices

Semiconductor device and manufacturing method thereof

Effective work function tuning via silicide induced interface dipole modulation for metal gates

Channel strain inducing architecture and doping technique at replacement poly gate (RPG) stage

2d-channel transistor structure with source-drain engineering

Integrated circuit structure and method with hybrid orientation for FinFET

Integrated circuit structure and method with hybrid orientation for FinFET

Negative capacitance finFET and method of fabricating thereof

Dual channel structure

Contact structures in semiconductor devices

Memory circuit and write method

Contact structures in semiconductor devices

Contact structures in semiconductor devices

Dipoles in semiconductor devices

Semiconductor device with tunable threshold voltage and method for manufacturing the same

Spacer structure for semiconductor device and method for forming the same

Semiconductor devices including FTJ structure

Graphene layer for low resistance contacts and damascene interconnects

Spacer structure for semiconductor device and method for forming the same

Effective work function tuning via silicide induced interface dipole modulation for metal gates

Semiconductor device structure with channel and method for forming the same

Semiconductor device structure with channel and method for forming the same

2D-channel transistor structure with source-drain engineering

Integrated circuit structure and method with hybrid orientation for FinFET

Gate structure in semiconductor device and method of forming the same

Source and drain dislocation fabrication in FinFETs

MOSFET structure with T-shaped epitaxial silicon channel

Channel strain inducing architecture and doping technique at replacement poly gate (RPG) stage

UNITED MICROELECTRONICS CORP

Semiconductor MOS transistor device and method for making the same

Method for fabricating strained-silicon CMOS transistors

Semiconductor MOS transistor device and method for making the same

Semiconductor MOS transistor device and method for making the same

Method of fabricating strained-silicon transistors

TAIWAN SEMICONDUCTOR MFG

Source and drain dislocation fabrication in FinFETs

Source and drain dislocation fabrication in FinFETs

GOTO KEN-ICHI

SOI transistors with improved source/drain structures with enhanced strain

DHANYAKUMAR MAHAVEER SATHAIYA

MOSFET structure with T-shaped epitaxial silicon channel

LIU CHIA-WEN

Method for forming a semiconductor transistor device with optimized dopant profile