Inventor · disambiguated record
Stephen C. Horne
Also filed as: HORNE STEPHEN C · HORNE STEPHEN CRAIG
47 granted patents·762 citations·filing 1990–2016
98Inventor score
Top patents by PatentIndex Score
47 records- 0191US10520249B2Process and apparatus for processing a hydrocarbon gas streamENCANA CORP·Filed 2016·Granted Dec 31, 2019·4 cites·19 claims
- 0288US9645721B2Device input modes with corresponding cover configurationsAPPLE INC·Filed 2013·Granted May 9, 2017·11 cites·22 claims
- 0385US5430394AConfiguration and method for testing a delay chain within a microprocessor clock generatorADVANCED MICRO DEVICES INC·Filed 1994·Granted Jul 4, 1995·43 cites·20 claims
- 0484US6066965AMethod and apparatus for a N-nary logic circuit using 1 of 4 signalsEVSX INC·Filed 1998·Granted May 23, 2000·48 cites·16 claims
- 0582US5920097ACompact, dual-transistor integrated circuitADVANCED MICRO DEVICES INC·Filed 1997·Granted Jul 6, 1999·43 cites·20 claims
- 0680US6107835AMethod and apparatus for a logic circuit with constant power consumptionINTRINSITY INC·Filed 1998·Granted Aug 22, 2000·36 cites·20 claims
- 0780US6069497AMethod and apparatus for a N-nary logic circuit using 1 of N signalsEVSX INC·Filed 1998·Granted May 30, 2000·40 cites·24 claims
- 0877US6118304AMethod and apparatus for logic synchronizationINTRINSITY INC·Filed 1998·Granted Sep 12, 2000·33 cites·25 claims
- 0975US5812832ADigital clock waveform generator and method for generating a clock signalADVANCED MICRO DEVICES INC·Filed 1993·Granted Sep 22, 1998·30 cites·20 claims
- 1073US6181596B1Method and apparatus for a RAM circuit having N-Nary output interfaceINTRINSITY INC·Filed 1999·Granted Jan 30, 2001·21 cites·10 claims
- 1173US5570294ACircuit configuration employing a compare unit for testing variably controlled delay unitsADVANCED MICRO DEVICES INC·Filed 1994·Granted Oct 29, 1996·33 cites·21 claims
- 1270US9405917B2Mechanism for protecting integrated circuits from security attacksAPPLE INC·Filed 2014·Granted Aug 2, 2016·2 cites·20 claims
- 1370US6287953B1Minimizing transistor size in integrated circuitsADVANCED MICRO DEVICES INC·Filed 2000·Granted Sep 11, 2001·12 cites·22 claims
- 1470US5444406ASelf-adjusting variable drive strength buffer circuit and method for controlling the drive strength of a buffer circuitADVANCED MICRO DEVICES INC·Filed 1993·Granted Aug 22, 1995·22 cites·6 claims
- 1569US6288589B1Method and apparatus for generating clock signalsINTRINSITY INC·Filed 1998·Granted Sep 11, 2001·29 cites·20 claims
- 1668US7026691B1Minimizing transistor size in integrated circuitsADVANCED MICRO DEVICES INC·Filed 2001·Granted Apr 11, 2006·10 cites·20 claims
- 1767US8837226B2Memory including a reduced leakage wordline driverMCCOMBS EDWARD M·Filed 2011·Granted Sep 16, 2014·4 cites·21 claims
- 1866US5796651AMemory device using a reduced word line voltage during read operations and a method of accessing such a memory deviceADVANCED MICRO DEVICES INC·Filed 1997·Granted Aug 18, 1998·25 cites·20 claims
- 1965US6268746B1Method and apparatus for logic synchronizationINTRINSITY INC·Filed 2000·Granted Jul 31, 2001·10 cites·16 claims
- 2065US6051881AForming local interconnects in integrated circuitsADVANCED MICRO DEVICES INC·Filed 1997·Granted Apr 18, 2000·32 cites·9 claims
- 2163US5892373ADistributed gated clock driverADVANCED MICRO DEVICES INC·Filed 1997·Granted Apr 6, 1999·18 cites·10 claims
- 2259US6732346B2Generation of route rulesINTRINSITY INC·Filed 2002·Granted May 4, 2004·9 cites·12 claims
- 2359US5444407AMicroprocessor with distributed clock generatorsADVANCED MICRO DEVICES INC·Filed 1992·Granted Aug 22, 1995·34 cites·13 claims
- 2458US6745357B2Dynamic logic scan gate method and apparatusINTRINSITY INC·Filed 2001·Granted Jun 1, 2004·8 cites·16 claims
- 2558US5289588AInterlock acquisition for critical code section execution in a shared memory common-bus individually cached multiprocessor systemADVANCED MICRO DEVICES INC·Filed 1990·Granted Feb 22, 1994·34 cites·32 claims
- 2657US5844836AMemory cell having increased capacitance via a local interconnect to gate capacitor and a method for making such a cellADVANCED MICRO DEVICES INC·Filed 1997·Granted Dec 1, 1998·17 cites·20 claims
- 2754US5444402AVariable strength clock signal driver and method of manufacturing the sameADVANCED MICRO DEVICES INC·Filed 1993·Granted Aug 22, 1995·11 cites·10 claims
- 2853US6146954AMinimizing transistor size in integrated circuitsADVANCED MICRO DEVICES INC·Filed 1998·Granted Nov 14, 2000·18 cites·20 claims
- 2953US6104642AMethod and apparatus for 1 of 4 register file designINTRINSITY INC·Filed 1998·Granted Aug 15, 2000·12 cites·28 claims
- 3053US6046088AMethod for self-aligning polysilicon gates with field isolation and the resultant structureADVANCED MICRO DEVICES INC·Filed 1997·Granted Apr 4, 2000·19 cites·10 claims
- 3149US6911846B1Method and apparatus for a 1 of N signalINTRINSITY INC·Filed 1998·Granted Jun 28, 2005·11 cites·16 claims
- 3245US6271683B1Dynamic logic scan gate method and apparatusINTRINSITY INC·Filed 1999·Granted Aug 7, 2001·16 cites·20 claims
- 3341US6233707B1Method and apparatus that allows the logic state of a logic gate to be tested when stopping or starting the logic gate's clockINTRINSITY INC·Filed 1998·Granted May 15, 2001·12 cites·28 claims
- 3441US5751173AVariable strength clock signal driver and method of manufacturing the sameADVANCED MICRO DEVICES INC·Filed 1995·Granted May 12, 1998·6 cites·2 claims
- 3539US6191034B1Forming minimal size spaces in integrated circuit conductive linesADVANCED MICRO DEVICES INC·Filed 1999·Granted Feb 20, 2001·7 cites·12 claims
- 3639US6046931AMethod and apparatus for a RAM circuit having N-nary output interfaceEVSX INC·Filed 1998·Granted Apr 4, 2000·5 cites·4 claims
- 3738US6571378B1Method and apparatus for a N-NARY logic circuit using capacitance isolationINTRINSITY INC·Filed 2000·Granted May 27, 2003·1 cites·15 claims
- 3838US6445213B1Method for calculating dynamic logic block propagation delay targets using time borrowingINTRINSITY INC·Filed 2001·Granted Sep 3, 2002·0 cites·14 claims
- 3937US5930659AForming minimal size spaces in integrated circuit conductive linesADVANCED MICRODEVICES INC·Filed 1997·Granted Jul 27, 1999·6 cites·12 claims
- 4037US5295259AData cache and method for handling memory errors during copy-backADVANCED MICRO DEVICES INC·Filed 1991·Granted Mar 15, 1994·9 cites·4 claims
- 4135US6415405B1Method and apparatus for scan of synchronized dynamic logic using embedded scan gatesINTRINSITY INC·Filed 1999·Granted Jul 2, 2002·3 cites·19 claims
- 4235US6069836AMethod and apparatus for a RAM circuit having N-nary word line generationEVSX INC·Filed 1998·Granted May 30, 2000·3 cites·12 claims
- 4334US6252425B1Method and apparatus for an N-NARY logic circuitINTRINSITY INC·Filed 1999·Granted Jun 26, 2001·5 cites·28 claims
- 4433US6124735AMethod and apparatus for a N-nary logic circuit using capacitance isolationINTRINSITY INC·Filed 1998·Granted Sep 26, 2000·4 cites·23 claims
- 4533US6118716AMethod and apparatus for an address triggered RAM circuitEVSX INC·Filed 1998·Granted Sep 12, 2000·2 cites·27 claims
- 4632US6115294AMethod and apparatus for multi-bit register cellEVSX INC·Filed 1999·Granted Sep 5, 2000·3 cites·27 claims
- 4727US6412085B1Method and apparatus for a special stress mode for N-NARY logic that initializes the logic into a functionally illegal stateINTRINSITY INC·Filed 1999·Granted Jun 25, 2002·1 cites·20 claims
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