Inventor
SENAPATI DIPTI RANJAN
US3 patents
Patents
3 patentsUS10878153B1Dec 29, 2020
Apparatuses and methods for accurate and efficient clock domain and reset domain verification with register transfer level memory inference
SYNOPSYS INC9 citations79
US11526641B2Dec 13, 2022
Formal gated clock conversion for field programmable gate array (FPGA) synthesis
SYNOPSYS INC0 citations53
US9792394B2Oct 17, 2017
Accurate glitch detection
SYNOPSYS INC1 citations46