Inventor · disambiguated record
Donald L. Wheater
Also filed as: WHEATER DONALD L · WHEATER DONALD LAWRENCE
34 granted patents·1,007 citations·filing 1997–2012
98Inventor score
Top patents by PatentIndex Score
34 records- 0196US5961653AProcessor based BIST for an embedded memoryIBM·Filed 1997·Granted Oct 5, 1999·235 cites·49 claims
- 0295US6233184B1Structures for wafer level test and burn-inIBM·Filed 1998·Granted May 15, 2001·102 cites·44 claims
- 0392US6768694B2Method of electrically blowing fuses under control of an on-chip tester interface apparatusIBM·Filed 2002·Granted Jul 27, 2004·84 cites·44 claims
- 0492US6618682B2Method for test optimization using historical and actual fabrication test dataIBM·Filed 2001·Granted Sep 9, 2003·88 cites·16 claims
- 0592US6426904B2Structures for wafer level test and burn-inIBM·Filed 2001·Granted Jul 30, 2002·43 cites·30 claims
- 0686US8423847B2Microcontroller for logic built-in self test (LBIST)GRISE GARY D·Filed 2012·Granted Apr 16, 2013·5 cites·17 claims
- 0784US6058496ASelf-timed AC CIO wrap method and apparatusIBM·Filed 1997·Granted May 2, 2000·63 cites·20 claims
- 0883US6426641B1Single pin performance screen ring oscillator with frequency divisionIBM·Filed 1998·Granted Jul 30, 2002·77 cites·6 claims
- 0982US6708305B1Deterministic random LBISTIBM·Filed 2000·Granted Mar 16, 2004·29 cites·20 claims
- 1081US7607060B2System and method for performing high speed memory diagnostics via built-in-self-testIBM·Filed 2006·Granted Oct 20, 2009·13 cites·20 claims
- 1180US5899703AMethod for chip testingIBM·Filed 1997·Granted May 4, 1999·51 cites·6 claims
- 1278US7870454B2Structure for system for and method of performing high speed memory diagnostics via built-in-self-testIBM·Filed 2008·Granted Jan 11, 2011·9 cites·8 claims
- 1377US7490280B2Microcontroller for logic built-in self test (LBIST)IBM·Filed 2006·Granted Feb 10, 2009·6 cites·10 claims
- 1477US7381986B2Arrangement for testing semiconductor chips while incorporated on a semiconductor waferIBM·Filed 2006·Granted Jun 3, 2008·6 cites·8 claims
- 1576US8294149B2Test structure and methodology for three-dimensional semiconductor structuresBERNSTEIN KERRY·Filed 2007·Granted Oct 23, 2012·6 cites·1 claims
- 1671US7103814B2Testing logic and embedded memory in parallelIBM·Filed 2002·Granted Sep 5, 2006·16 cites·12 claims
- 1770US6333706B1Built-in self-test for analog to digital converterIBM·Filed 1999·Granted Dec 25, 2001·35 cites·22 claims
- 1869US7073100B2Method for testing embedded DRAM arraysIBM·Filed 2002·Granted Jul 4, 2006·16 cites·10 claims
- 1969US6073258AMethod and device for performing two dimensional redundancy calculations on embedded memories avoiding fail data collectionIBM·Filed 1998·Granted Jun 6, 2000·29 cites·20 claims
- 2065US8205124B2Microcontroller for logic built-in self test (LBIST)GRISE GARY D·Filed 2008·Granted Jun 19, 2012·3 cites·26 claims
- 2163US7435990B2Arrangement for testing semiconductor chips while incorporated on a semiconductor waferIBM·Filed 2003·Granted Oct 14, 2008·7 cites·5 claims
- 2263US6549150B1Integrated test structure and method for verification of microelectronic devicesIBM·Filed 2001·Granted Apr 15, 2003·16 cites·22 claims
- 2362US6229465B1Built in self test method and structure for analog to digital converterIBM·Filed 1999·Granted May 8, 2001·27 cites·27 claims
- 2458US7237165B2Method for testing embedded DRAM arraysIBM·Filed 2004·Granted Jun 26, 2007·9 cites·18 claims
- 2556US6804803B2Method for testing integrated logic circuitsIBM·Filed 2001·Granted Oct 12, 2004·5 cites·25 claims
- 2653US6724210B2Method and apparatus for reduced pin count package connection verificationIBM·Filed 2001·Granted Apr 20, 2004·5 cites·20 claims
- 2750US8729549B2Test structure and methodology for three-dimensional semiconductor structuresBERNSTEIN KERRY·Filed 2012·Granted May 20, 2014·0 cites·15 claims
- 2849US6754864B2System and method to predetermine a bitmap of a self-tested embedded arrayIBM·Filed 2001·Granted Jun 22, 2004·7 cites·15 claims
- 2946US7103816B2Method and system for reducing test data volume in the testing of logic productsCADENCE DESIGN SYSTEMS INC·Filed 2001·Granted Sep 5, 2006·4 cites·6 claims
- 3042US6730529B1Method for chip testingIBM·Filed 1999·Granted May 4, 2004·8 cites·6 claims
- 3141US7145977B2Diagnostic method and apparatus for non-destructively observing latch dataIBM·Filed 2003·Granted Dec 5, 2006·2 cites·23 claims
- 3241US6931346B2Method and apparatus for reduced pin count package connection verificationIBM·Filed 2003·Granted Aug 16, 2005·1 cites·11 claims
- 3340US7916826B2Diagnostic method and apparatus for non-destructively observing latch dataIBM·Filed 2008·Granted Mar 29, 2011·0 cites·17 claims
- 3438US7453973B2Diagnostic method and apparatus for non-destructively observing latch dataIBM·Filed 2006·Granted Nov 18, 2008·0 cites·6 claims
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