Inventor
MISHRA LALAN JEE
US92 patents
Patents
50 patentsUS11106620B1Aug 31, 2021
Mixed signal device address assignment
QUALCOMM INC11 citations86
US10572438B1Feb 25, 2020
Dynamic optimal data sampling time on a multi-drop bus
QUALCOMM INC12 citations86
US9990316B2Jun 5, 2018
Enhanced serial peripheral interface
QUALCOMM INC6 citations84
US9563398B2Feb 7, 2017
Impedance-based flow control for a two-wire interface system with variable frame length
QUALCOMM INC7 citations83
US11513991B2Nov 29, 2022
Batch operation across an interface
QUALCOMM INC6 citations75
US11356314B2Jun 7, 2022
Pulse amplitude modulation (PAM) encoding for a communication bus
QUALCOMM INC2 citations73
US11119966B2Sep 14, 2021
Mixed-mode radio frequency front-end interface
QUALCOMM INC2 citations73
US10642778B2May 5, 2020
Slave master-write/read datagram payload extension
QUALCOMM INC2 citations73
US10635630B2Apr 28, 2020
Flexible protocol and associated hardware for one-wire radio frequency front-end interface
QUALCOMM INC3 citations73
US10572410B2Feb 25, 2020
Function-specific communication on a multi-drop bus for coexistence management
QUALCOMM INC4 citations73
US10528503B1Jan 7, 2020
Real-time dynamic addressing scheme for device priority management
QUALCOMM INC6 citations73
US10515044B2Dec 24, 2019
Communicating heterogeneous virtual general-purpose input/output messages over an I3C bus
QUALCOMM INC3 citations73
US10474622B1Nov 12, 2019
Method and apparatus for latency management of data communication over serial bus
QUALCOMM INC3 citations73
US10241953B2Mar 26, 2019
Dynamic data-link selection over common physical interface
QUALCOMM INC6 citations73
US10140242B2Nov 27, 2018
General purpose input/output (GPIO) signal bridging with I3C bus interfaces and virtualization in a multi-node network
QUALCOMM INC3 citations73
US9971666B2May 15, 2018
Technique of link state detection and wakeup in power state oblivious interface
QUALCOMM INC2 citations73
US9252997B1Feb 2, 2016
Data link power reduction technique using bipolar pulse amplitude modulation
QUALCOMM INC4 citations73
US11515676B2Nov 29, 2022
Thermal mitigation for USB power delivery
QUALCOMM INC5 citations72
US11509130B2Nov 22, 2022
Disconnection arc prevention in cable-supplied power connection
QUALCOMM INC4 citations72
US10963035B2Mar 30, 2021
Low power PCIe
QUALCOMM INC4 citations72
US9880895B2Jan 30, 2018
Serial interface with bit-level acknowledgement and error correction
QUALCOMM INC2 citations72
US9619427B2Apr 11, 2017
Hybrid virtual GPIO
QUALCOMM INC2 citations72
US10467154B2Nov 5, 2019
Multi-port multi-sideband-GPIO consolidation technique over a multi-drop serial bus
QUALCOMM INC3 citations71
US10005555B2Jun 26, 2018
Imaging using multiple unmanned aerial vehicles
QUALCOMM INC6 citations71
US9475198B2Oct 25, 2016
System and method for dynamic robot manipulator selection
QUALCOMM INC6 citations65
US11847087B2Dec 19, 2023
Systems and methods for chip operation using serial peripheral interface (SPI) with reduced pin options
QUALCOMM INC0 citations63
US11256637B2Feb 22, 2022
Legacy-compatible 8-bit addressing on RFFE bus for increased device connections
QUALCOMM INC0 citations63
US11119790B2Sep 14, 2021
Low latency clock-based control via serial bus
QUALCOMM INC0 citations63
US11119696B2Sep 14, 2021
Technique of register space expansion with branched paging
QUALCOMM INC0 citations63
US10983552B2Apr 20, 2021
Low latency trigger activation mechanism using bus protocol enhancement
QUALCOMM INC1 citations63
US10838898B2Nov 17, 2020
Bit-interleaved bi-directional transmissions on a multi-drop bus for time-critical data exchange
QUALCOMM INC1 citations63
US10693674B2Jun 23, 2020
In-datagram critical-signaling using pulse-count-modulation for I3C bus
QUALCOMM INC1 citations63
US12573798B2Mar 10, 2026
Dynamic lane reallocation based on bandwidth needs
QUALCOMM INC0 citations62
US12505062B2Dec 23, 2025
Asynchronous double data-lane DDR (ADL-DDR)
QUALCOMM INC0 citations62
US12283961B2Apr 22, 2025
Automatic clock rate synchronization for 1-wire radio frequency front-end interface
QUALCOMM INC0 citations62
US12124401B2Oct 22, 2024
Interrupt management on a one-wire bidirectional bus
QUALCOMM INC0 citations62
US11886366B2Jan 30, 2024
One-wire bidirectional bus signaling with manchester encoding
QUALCOMM INC1 citations62
US11520729B2Dec 6, 2022
I2C bus architecture using shared clock and dedicated data lines
QUALCOMM INC1 citations62
US11520727B2Dec 6, 2022
Sideband signaling in a peripheral component interconnect (PCI) express (PCIE) link
QUALCOMM INC1 citations62
US11513994B2Nov 29, 2022
Timed-trigger synchronization enhancement
QUALCOMM INC0 citations62
US11275703B1Mar 15, 2022
Real-time control compliant radio frequency coexistence management bus
QUALCOMM INC1 citations62
US11177856B2Nov 16, 2021
Crosstalk amelioration systems and methods in a radio frequency front end (RFFE) communication system
QUALCOMM INC0 citations62
US10997114B2May 4, 2021
Vector decoding in time-constrained double data rate interface
QUALCOMM INC1 citations62
US10872055B2Dec 22, 2020
Triple-data-rate technique for a synchronous link
QUALCOMM INC1 citations62
US10627881B2Apr 21, 2020
Back power protection (BPP) in a system on a chip (SOC) with critical signaling scheme
QUALCOMM INC1 citations62
US10423551B2Sep 24, 2019
Ultra-short RFFE datagrams for latency sensitive radio frequency front-end
QUALCOMM INC1 citations62
US10289579B2May 14, 2019
Digital aggregation of interrupts from peripheral devices
QUALCOMM INC1 citations62
US11334134B2May 17, 2022
Integrated circuit
QUALCOMM INC0 citations61
US11023408B2Jun 1, 2021
I3C single data rate write flow control
QUALCOMM INC0 citations60
US10445270B2Oct 15, 2019
Configuring optimal bus turnaround cycles for master-driven serial buses
QUALCOMM INC1 citations60
Showing the top 50 of 92 patents by PatentIndex Score.