Inventor

GU SHIQUN

US128 patents

⚠️ This page may combine multiple inventors who share the name “GU SHIQUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GU SHIQUN

QUALCOMM INC

Integrated device package comprising bridge in litho-etchable layer

Memory cell and method of forming a magnetic tunnel junction (MTJ) of a memory cell

Integrated device comprising a capacitor that includes multiple pins and at least one pin that traverses a plate of the capacitor

Integrated device comprising flexible connector between integrated circuit (IC) packages

Integrating through substrate vias from wafer backside layers of integrated circuits

Magnetic tunnel junction device with separate read and write paths

Bondable device including a hydrophilic layer

Via first plus via last technique for IC interconnects

Monolithic integrated emitter-detector array in a flexible substrate for biometric sensing

Integrated device package comprising silicon bridge in an encapsulation layer

Integrated device comprising high density interconnects in inorganic layers and redistribution layers in organic layers

Package-on-package (POP) structure including multiple dies

System-in-package with interposer pitch adapter

Semiconductor device and methods of making semiconductor device using graphene

Through substrate via with embedded decoupling capacitor

Techniques for placement of active and passive devices within a chip

Integrated device comprising stacked dies on redistribution layers

Toroid inductor in redistribution layers (RDL) of an integrated device

Integrated circuit module with lead frame micro-needles

Metal-insulator-metal (MIM) capacitor in redistribution layer (RDL) of an integrated device

Bottom package with metal post interconnections

Interposer device including at least one transistor and at least one through-substrate via

High density fan out package structure

Backside ground plane for integrated circuit

LSI LOGIC CORP

Method of reducing process plasma damage using optical spectroscopy

Method of reducing process plasma damage using optical spectroscopy

Method for preventing borderless contact to well leakage

Method of reducing leakage using Si3N4 or SiON block dielectric films

Method for preventing borderless contact to well leakage

High-k dielectric bird&#39;s beak optimizations using in-situ O2 plasma oxidation

Method and apparatus for reducing microtrenching for borderless vias created in a dual damascene process

Superconductor wires for back end interconnects

Selective high k dielectrics removal

Plasma passivation

Optical intensity modifier

GU SHIQUN

Magnetic tunnel junction (MTJ) storage element and spin transfer torque magnetoresistive random access memory (STT-MRAM) cells having an MTJ

Active thermal control for stacked IC devices

Wide input/output memory with low density, low latency and high density, high latency blocks

KANG SEUNG H

Two mask MTJ integration for STT MRAM

STT MRAM magnetic tunnel junction architecture and integration

UNIV ILLINOIS

Chalcogenide optical pumping system driven by broad absorption band

Chalcogenide optical pumping system having broad emission band

WANG FENG

Load balancing scheme in multiple channel DRAM systems

Multiple power mode system and method for memory

KIM JONGHAE

Three dimensional inductor and transformer

Techniques for placement of active and passive devices within a chip

LSI CORP

Process and apparatus for simultaneous light and radical surface treatment of integrated circuit structure

NOWAK MATTHEW MICHAEL

Through silicon via with embedded decoupling capacitor

RAMACHANDRAN VIDHYA

Structure and method for strain-relieved TSV

ZHANG RONGTIAN

FinFET compatible capacitor circuit

High-k dielectric bird's beak optimizations using in-situ O2 plasma oxidation