Inventor
CONG HAI
SG27 patents
⚠️ This page may combine multiple inventors who share the name “CONG HAI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
GLOBALFOUNDRIES SG PTE LTD
15 patentsUS9972775B2May 15, 2018
Integrated magnetic random access memory with logic device having low-k interconnects
GLOBALFOUNDRIES SG PTE LTD13 citations83
US7892900B2Feb 22, 2011
Integrated circuit system employing sacrificial spacers
GLOBALFOUNDRIES SG PTE LTD9 citations83
US10608046B2Mar 31, 2020
Integrated two-terminal device with logic device for embedded application
GLOBALFOUNDRIES SG PTE LTD4 citations72
US10461247B2Oct 29, 2019
Integrated magnetic random access memory with logic device having low-K interconnects
GLOBALFOUNDRIES SG PTE LTD4 citations72
US10446607B2Oct 15, 2019
Integrated two-terminal device with logic device for embedded application
GLOBALFOUNDRIES SG PTE LTD4 citations72
US8987134B2Mar 24, 2015
Reliable interconnect for semiconductor device
GLOBALFOUNDRIES SG PTE LTD4 citations70
US10103097B2Oct 16, 2018
CD control
GLOBALFOUNDRIES SG PTE LTD0 citations52
US9564575B2Feb 7, 2017
Dual encapsulation integration scheme for fabricating integrated circuits with magnetic random access memory structures
GLOBALFOUNDRIES SG PTE LTD1 citations52
US8836139B2Sep 16, 2014
CD control
GLOBALFOUNDRIES SG PTE LTD0 citations52
US9520299B2Dec 13, 2016
Etch bias control
GLOBALFOUNDRIES SG PTE LTD0 citations51
US9230886B2Jan 5, 2016
Method for forming through silicon via with wafer backside protection
GLOBALFOUNDRIES SG PTE LTD0 citations51
US10510825B2Dec 17, 2019
Metal-insulator-metal capacitor with improved time-dependent dielectric breakdown
GLOBALFOUNDRIES SG PTE LTD0 citations48
US9437550B2Sep 6, 2016
TSV without zero alignment marks
GLOBALFOUNDRIES SG PTE LTD0 citations41
US9805971B2Oct 31, 2017
Method of forming a via contact
GLOBALFOUNDRIES SG PTE LTD0 citations40
US10115625B2Oct 30, 2018
Methods for removal of hard mask
GLOBALFOUNDRIES SG PTE LTD0 citations37
CHARTERED SEMICONDUCTOR MFG
4 patentsUS7247555B2Jul 24, 2007
Method to control dual damascene trench etch profile and trench depth uniformity
CHARTERED SEMICONDUCTOR MFG13 citations84
US7879732B2Feb 1, 2011
Thin film etching method and semiconductor device fabrication using same
CHARTERED SEMICONDUCTOR MFG8 citations83
US7745320B2Jun 29, 2010
Method for reducing silicide defects in integrated circuits
CHARTERED SEMICONDUCTOR MFG7 citations72
US7960283B2Jun 14, 2011
Method for reducing silicide defects in integrated circuits
CHARTERED SEMICONDUCTOR MFG0 citations50