Inventor
KOESTERS JOHANNES
DE14 patents
Patents
14 patentsUS7386775B2Jun 10, 2008
Scan verification for a scan-chain device under test
IBM27 citations89
US7376875B2May 20, 2008
Method of improving logical built-in self test (LBIST) AC fault isolations
IBM13 citations83
US7350124B2Mar 25, 2008
Method and apparatus for accelerating through-the pins LBIST simulation
IBM8 citations72
US7853420B2Dec 14, 2010
Performing temporal checking
IBM3 citations62
US7464354B2Dec 9, 2008
Method and apparatus for performing temporal checking
IBM5 citations62
US7305636B2Dec 4, 2007
Method and system for formal unidirectional bus verification using synthesizing constrained drivers
IBM2 citations61
US7565636B2Jul 21, 2009
System for performing verification of logic circuits
IBM4 citations60
US7398494B2Jul 8, 2008
Method for performing verification of logic circuits
IBM3 citations60
US7213220B2May 1, 2007
Method for verification of gate level netlists using colored bits
IBM6 citations60
US7447960B2Nov 4, 2008
Method of efficiently loading scan and non-scan memory elements
IBM2 citations58
US7353159B2Apr 1, 2008
Method for parallel simulation on a single microprocessor using meta-models
IBM5 citations56
US7478304B2Jan 13, 2009
Apparatus for accelerating through-the-pins LBIST simulation
IBM0 citations50
US8826206B1Sep 2, 2014
Testing two-state logic power island interface
IBM1 citations49
US7725789B2May 25, 2010
Apparatus for efficiently loading scan and non-scan memory elements
IBM0 citations47