Inventor

TSENG HSIANG JEN

TW39 patents

⚠️ This page may combine multiple inventors who share the name “TSENG HSIANG JEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TSENG HSIANG JEN

TAIWAN SEMICONDUCTOR MFG CO LTD

Semiconductor device having engineering change order (ECO) cells and method of using

Layout of standard cells for predetermined function in integrated circuits

FinFET with an asymmetric source/drain structure and method of making same

Connecting techniques for stacked CMOS devices

Standard cell having cell height being non-integral multiple of nominal minimum pitch

Standard cells for predetermined function having different types of layout

Connecting techniques for stacked CMOS devices

Connecting techniques for stacked CMOS devices

System for designing integrated circuit layout and method of making the integrated circuit layout

Standard cell layout, semiconductor device having engineering change order (ECO) cells and method

Standard-cell layout structure with horn power and smart metal cut

Integrated circuit having non-integral multiple pitch

System for designing integrated circuit layout and method of making the integrated circuit layout

Connecting techniques for stacked substrates

Connection structure for stacked substrates

Standard-cell layout structure with horn power and smart metal cut

Integrated circuits and manufacturing methods thereof

Integrated circuits and manufacturing methods thereof

Standard-cell layout structure with horn power and smart metal cut

Standard-cell layout structure with horn power and smart metal cut

Semiconductor structures and methods of forming the same

Semiconductor structures and methods of forming the same

Semiconductor structures and methods of forming the same

System for designing integrated circuit layout and method of making the integrated circuit layout

Integrated circuit designing system

Integrated circuits and manufacturing methods thereof

Electromigration resistant semiconductor device

Method and layout of an integrated circuit

Semiconductor structures and methods of forming the same

TAIWAN SEMICONDUCTOR MFG

FinFET with an asymmetric source/drain structure and method of making same

Standard cell metal structure directly over polysilicon structure

Integrated circuits and manufacturing methods thereof

Contact structure of non-planar semiconductor device

Method and layout of an integrated circuit

Layout of an integrated circuit

Integrated circuits and manufacturing methods thereof

TSENG HSIANG-JEN

Method and layout of an integrated circuit

Method and layout of an integrated circuit

KESHAVARZI ALI

Integrated circuits and manufacturing methods thereof