Inventor

HUANG KUO-TAI

TW66 patents

⚠️ This page may combine multiple inventors who share the name “HUANG KUO-TAI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HUANG KUO-TAI

UNITED MICROELECTRONICS CORP

Method of fabricating a dual metal gate having two different gate dielectric layers

Structure of a capacitor in a semiconductor device having a self align contact window which has a slanted sidewall

Method for fabricating a shallow-trench isolation structure with a rounded corner in integrated circuit

Method of fabricating a thin and structurally-undefective dielectric structure for a storage capacitor in dynamic random-access memory

Method for fabricating capacitor in integrated circuit

Method for fabricating a capacitor in a semiconductor device

Fabrication method of a tantalum pentoxide dielectric layer for a DRAM capacitor

Method for forming charge storage structure

Method of manufacturing shallow trench isolation structure

Salicide process utilizing a cluster ion implantation process

Method of manufacturing shallow trench isolation

Method of fabricating shallow trench isolation

Method for fabricating gate oxide layer

Method of fabricating a capacitor of a dynamic random access memory

Method for preventing oxide recess formation in a shallow trench isolation

Method for fabricating a gate dielectric layer

Method of fabricating DRAM capacitor

Method of fabricating DRAM capacitor

Conformity of ultra-thin nitride deposition for DRAM capacitor

Method for manufacturing shallow trench isolation structure

Method for manufacturing DRAM capacitor

Method of fabricating capacitor utilizing an ion implantation method

Method for manufacturing transistor

Method for manufacturing lower electrode of DRAM capacitor

Method of forming a storage electrode of a capacitor on an ion-implanted isolation layer

Method of manufacturing contact pad

Method of manufacturing dielectric film of capacitor in dynamic random access memory

Method of fabricating gate structure

TAIWAN SEMICONDUCTOR MFG

Integrated high-K/metal gate in CMOS process flow

Hybrid process for forming metal gates

High-k dielectric metal gate device structure and method for forming the same

Integrated high-k/metal gate in CMOS process flow

Method of integrating high-K/metal gate in CMOS process flow

Integrated high-k/metal gate in CMOS process flow

Semiconductor device gate structure including a gettering layer

TAIWAN SEMICONDUCTOR MFG CO LTD

Method of forming a single metal that performs N work function and P work function in a high-k/metal gate process

Integrated high-K/metal gate in CMOS process flow

Gate stacks for semiconductor devices of different conductivity types

Single metal that performs N work function and P work function in a high-K/metal gate

HSU PENG-FU

Method of fabricating dual high-k metal gate for MOS devices

Method of fabricating dual high-k metal gates for MOS devices

Hybrid process for forming metal gates of MOS devices

LIN YIH-ANN

Method of forming a single metal that performs N work function and P work function in a high-k/metal gate process

Methods of fabricating high-k metal gate devices

CHEN CHIEN-HAO

Method of fabricating a sealing structure for high-k metal gate

Sealing structure for high-K metal gate

HUANG KUO-TAI

Knife-handle

SAMSUNG ELECTRONICS CO LTD

Integrated circuit devices and method of manufacturing the same

(unassigned)

Method for preventing a by-product ion moving from a spacer

MASUOKA YURI

Method to improve dielectric quality in high-k metal gate technology