Inventor

YANG SHENG-HSING

TW48 patents

⚠️ This page may combine multiple inventors who share the name “YANG SHENG-HSING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YANG SHENG-HSING

UNITED MICROELECTRONICS CORP

VDMOS transistor and manufacturing method therefor

Method for manufacturing a VDMOS transistor

Method of manufacture of high coupling ratio single polysilicon floating gate EPROM or EEPROM cell

Electrostatic discharge protection circuit

Method of fabricating junction termination extension structure for high-voltage diode devices

Method of producing an LDMOS transistor having reduced dimensions, reduced leakage, and a reduced propensity to latch-up

Method of making an electrically erasable programmable memory device with improved erase and write operation

High voltage CMOS device to integrate low voltage controlling device

Method of fabricating a high-voltage lateral double diffused metal oxide semiconductor

Method for fabricating a bipolar power transistor

Lateral bipolar transistor and FET

Method for forming high voltage device

Self isolation manufacturing method

Method of making bipolar junction transistor

Method for fabricating high-voltage complementary metal-oxide-semiconductor transistors

Method of fabricating a metal gate MOS transistor with self-aligned first conductivity type source and drain regions and second conductivity type contact regions

Method of fabricating a high-voltage metal-gate CMOS device

Process for fabricating a CMOS transistor having high-voltage metal-gate

LDMOS transistor with reduced projective area of source region

Process for fabricating metal-gate CMOS transistor

Process for fabricating a vertical bipolar junction transistor

Process for fabricating a lateral bipolar junction transistor

VDMOS transistor with reduced projective area of source region

Method of fabricating a short-channel DMOS transistor with removable sidewall spacers

Process for fabricating high-voltage semiconductor power device

Method of fabricating high voltage junction termination extension structure for a semiconductor integrated circuit device

Method of producing VDMOS transistors

Use of double charge implant to improve retrograde process PMOS punch through voltage

Method of fabricating high voltage complementary metal oxide semiconductor transistors

Process of fabricating a bipolar junction transistor

Electrically programmable and erasable memory device with depression in lightly-doped source

Electrically erasable programmable memory device with improved erase and write operation

High voltage device

Method of forming high voltage device

Process for fabricating double well regions in semiconductor devices

Process for fabricating a high-voltage MOSFET

Process for fabricating bipolar junction transistor having reduced parasitic capacitance

Method of making a metal gate high voltage integrated circuit

Method of fabricating lateral bipolar transistors

Method of improving vertical BJT gain

Lateral bipolar transistor and FET compatible process for making it

Reliability testing method of dielectric thin film

Method of fabricating integration of high-voltage devices and low-voltage devices

Method for measuring capacitance of passive device region

Metal gate high voltage integrated circuit/process

UNITED MICROFLECTRONICS CORP

Method of making electrically programmable and erasable memory device with a depression

CHUNG SHAN INST OF SCIENCE

Embedded multi-functional preprocessing input data buffer in radar system

UNITED MICRELECTRONICS CORP

Multi-layer metallization capacitive structure for reduction of the simultaneous switching noise in integrated circuits