Inventor

MORRIS DALE C

US32 patents

⚠️ This page may combine multiple inventors who share the name “MORRIS DALE C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MORRIS DALE C

HEWLETT PACKARD DEVELOPMENT CO

Prefetch instruction for an unpredicted path including a flush field for indicating whether earlier prefetches are to be discarded and whether in-progress prefetches are to be aborted

Multiprocessor system with interactive synchronization of local clocks

Floating-point data speculation across a procedure call using an advanced load address table

Privilege promotion based on check of previous privilege level

External memory controller

System and method for adding an instruction to an instruction set architecture

Controlling error propagation due to fault in computing node of a distributed computing system

Method and apparatus for performing integer multiply operations using primitive multi-media operations that operate on smaller operands

Thinning operating systems

Data move engine to move a block of data

Data speculation across a procedure call using an advanced load address table

Superword memory-access instructions for data processor

HEWLETT PACKARD CO

Embedded hidden identification codes in digital objects

Computer memory address control apparatus utilizing hashed address tags in page tables which are compared to a combined address tag and index which are longer than the basic data width of the associated computer

Computer apparatus having special instructions to force ordered load and store operations

Emulated branch effected by trampoline mechanism

Computer system having an instruction for probing memory latency

Computer hardware instruction and method for computing population counts

Computer that selectively forces ordered execution of store and load operations between a CPU and a shared memory

Software method for implementing dismissible instructions on a computer

HEWLETT PACKARD ENTPR DEV LP

Split mode addressing a persistent memory

External memory controller

Fault tolerance for persistent main memory

Controlling error propagation due to fault in computing node of a distributed computing system

INST THE DEV OF EMERGING ARCHI

Method and apparatus for selectively controlling groups of registers

Computer architecture for the deferral of exceptions on speculative instructions

Advanced load address table entry invalidation based on register address wraparound

IDEA CORP

System for restoring predicate registers via a mask having at least a single bit corresponding to a plurality of registers

MORRIS DALE C

Computer processor with fairness monitor

ROSS JONATHAN K

In-processor dynamic address redirection table for substituting instruction strings

GOLDSTEIN MARTIN

Computer system with fabric modules

DE DINECHIN CHRISTOPHE

Computer workload migration using processor pooling