Inventor

MARTIN CHRIS G

US67 patents

⚠️ This page may combine multiple inventors who share the name “MARTIN CHRIS G”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MARTIN CHRIS G

MICRON TECHNOLOGY INC

Active termination circuit and method for controlling the impedance of external integrated circuit terminals

Active termination circuit and method for controlling the impedance of external integrated circuit terminals

Antifuse method to repair columns in a prefetched output memory architecture

Method of synchronizing read timing in a high speed memory system

Memory device with dual timing and signal latching control

Method and apparatus for memory array compressed data testing

Method of synchronizing read timing in a high speed memory system

Method of storing a temperature threshold in an integrated circuit, method of modifying operation of dynamic random access memory in response to temperature, programmable temperature sensing circuit and memory integrated circuit

Memory device with pipelined address path

Antifuse detection circuit

Memory device with pipelined column address path

Antifuse detection circuit

Method and apparatus for reading compressed test data from memory devices

Frequency-variable oscillator controlled high efficiency charge pump

Apparatus and method for repairing a semiconductor memory

Method and structures for reduced parasitic capacitance in integrated circuit metallizations

Active termination circuit and method for controlling the impedance of external integrated circuit terminals

Active termination circuit and method for controlling the impedance of external integrated circuit terminals

Method and structures for reduced parasitic capacitance in integrated circuit metallizations

Method of synchronizing read timing in a high speed memory system

Antifuse detection circuit

Lead frame decoupling capacitor semiconductor device packages including the same and methods

Memory device with pipelined address path

Lead frame decoupling capacitor, semiconductor device packages including the same and methods

Test socket and methods

Antifuse detection circuit

Method and apparatus for reading compressed test data from memory devices

Sense amplifier for complementary or non-complementary data signals

Sense amplifier for complement or no-complementary data signals

System for generating configuration output signal responsive to configuration input signal, enabling configuration, and providing status signal identifying enabled configuration responsive to the output signal

Charge sharing detection circuit for anti-fuses

Stacked device remapping and repair

Method and system for selecting redundant rows and columns of memory cells

Method of storing a temperature threshold in an integrated circuit, method of modifying operation of dynamic random access memory in response to temperature, programmable temperature sensing circuit and memory integrated circuit

Multi-mode synchronous memory device and method of operating and testing same

Stacked device remapping and repair

Apparatus and method for repairing a semiconductor memory

Active termination circuit and method for controlling the impedance of external integrated circuit terminals

Lead frame decoupling capacitor, semiconductor device packages including the same and methods

Method and system for selecting redundant rows and columns of memory cells

Multi-mode synchronous memory device and methods of operating and testing same

Antifuse detection circuit

Digital delay, digital phase shifter

Test socket and methods

Method and apparatus for reducing induced switching transients

Test socket and methods

Frequency-variable oscillator circuit

KEETH BRENT

Stacked device remapping and repair

Stacked device remapping and repair