Inventor
BALASUBRAMONIAN RAJEEV
US17 patents
⚠️ This page may combine multiple inventors who share the name “BALASUBRAMONIAN RAJEEV”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
HEWLETT PACKARD ENTPR DEV LP
5 patentsUS9846550B2Dec 19, 2017
Memory access methods and apparatus
HEWLETT PACKARD ENTPR DEV LP11 citations83
US10318420B2Jun 11, 2019
Draining a write queue based on information from a read queue
HEWLETT PACKARD ENTPR DEV LP5 citations73
US10620861B2Apr 14, 2020
Retrieve data block from determined devices
HEWLETT PACKARD ENTPR DEV LP1 citations62
US10303622B2May 28, 2019
Data write to subset of memory devices
HEWLETT PACKARD ENTPR DEV LP1 citations62
US10254988B2Apr 9, 2019
Memory device write based on mapping
HEWLETT PACKARD ENTPR DEV LP0 citations51
UNIV ROCHESTER
4 patentsUS6684298B1Jan 27, 2004
Dynamic reconfigurable memory hierarchy
UNIV ROCHESTER63 citations94
US7089443B2Aug 8, 2006
Multiple clock domain microprocessor
UNIV ROCHESTER33 citations91
US6834328B2Dec 21, 2004
Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures
UNIV ROCHESTER12 citations80
USRE42213EMar 8, 2011
Dynamic reconfigurable memory hierarchy
UNIV ROCHESTER3 citations62
BALASUBRAMONIAN RAJEEV
2 patentsUS7490220B2Feb 10, 2009
Multi-cluster processor operating only select number of clusters during each phase based on program statistic monitored at predetermined intervals
BALASUBRAMONIAN RAJEEV40 citations90
US8103856B2Jan 24, 2012
Performance monitoring for new phase dynamic optimization of instruction dispatch cluster configuration
BALASUBRAMONIAN RAJEEV9 citations82