Inventor

HAMAMOTO TAKESHI

JP107 patents

⚠️ This page may combine multiple inventors who share the name “HAMAMOTO TAKESHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HAMAMOTO TAKESHI

MITSUBISHI ELECTRIC CORP

Clock synchronous semiconductor memory device allowing testing by low speed tester

Clock generation circuit generating internal clock of small variation in phase difference from external clock, and semiconductor memory device including such clock generation circuit

Dynamic semiconductor memory device with reduced current consumption in sensing operation

Semiconductor device having lower minority carrier noise

Dynamic content addressable memory device and a method of operating thereof

Clock synchronous type semiconductor memory device that can switch word configuration

Internal potential generating circuit and boosted potential generating unit using pumping operation

Semiconductor memory device

Associative memory having simplified memory cell circuitry

Clock generating circuit ensuring a wide lock-allowing frequency range and allowing reduction in layout area as well as a semiconductor device provided with the same

Clock synchronous semiconductor device having a reduced clock access time

Semiconductor device capable of stably generating internal voltage with low supply voltage

Semiconductor memory device having controllable supplying capability of internal voltage

Memory device and sense amplifier control device

Semiconductor memory device having controllable supplying capability of internal voltage

Semiconductor memory device having controllable supplying capability of internal voltage

Content addressable memory device and a method of disabling a coincidence word thereof

Semiconductor memory device

Clock synchronous type semiconductor memory device that can switch word configuration

Semiconductor memory device with IO compression test mode

Semiconductor memory device consistently operating a plurality of memory cell arrays distributed in arrangement

Semiconductor circuit device having multiplex selection functions

Semiconductor integrated circuit device having improved stacked capacitor and manufacturing method therefor

Content addressable memory combining match comparisons of a plurality of cells

TOSHIBA KK

Semiconductor memory device

Insulated-gate transistor having narrow-bandgap-source

MOS random access memory having array of trench type one-capacitor/one-transistor memory cells

Dynamic random access memory device with the combined open/folded bit-line pair arrangement

MOS random access memory having array of trench type one-capacitor/one-transistor memory cells

Random access memory device with trench-type one-transistor memory cell structure

MOS random access memory having array of trench type one-capacitor/one-transistor memory cells

Semiconductor memory with pad electrode and bit line under stacked capacitor

Semiconductor device having epitaxial layer

Semiconductor device having epitaxial layer

Dynamic-type semiconductor memory device

Semiconductor device including an interface layer containing chlorine

Random access memory device with trench-type one-transistor memory cell structure

Semiconductor memory with insulation film embedded in groove formed on substrate

Semiconductor memory having capacitor electrode formed above bit line

Semiconductor memory device and manufacturing method thereof

Method of making trench type dynamic random access memory device

RENESAS TECH CORP

Semiconductor memory device allowing accurate burn-in test

Potential generating circuit capable of correctly controlling output potential

Semiconductor memory device with reduced current consumption during standby state

Semiconductor memory device allowing mounting of built-in self test circuit without addition of interface specification

Potential generating circuit capable of correctly controlling output potential

Nonvolatile semiconductor memory device including high efficiency and low cost redundant structure

Clock synchronous type semiconductor memory device

NEC CORP

Pattern data density inspection apparatus and density inspection method and recording medium storing pattern data density inspection program

NEC ELECTRONICS CORP

Optical proximity effect correcting method in semiconductor manufacturing process, which can sufficiently correct optical proximity effect, even under various situations with regard to size and shape of design pattern, and space width and position relation between design patterns