Inventor

NIDHI NIDHI

US40 patents

Patents

40 patents

US10312367B2Jun 4, 2019

Monolithic integration of high voltage transistors and low voltage non-planar transistors

INTEL CORP12 citations83

US11387328B2Jul 12, 2022

III-N tunnel device architectures and high frequency mixers employing a III-N tunnel device

INTEL CORP6 citations75

US12369358B2Jul 22, 2025

Co-integrated high performance nanoribbon transistors with high voltage thick gate finFET devices

INTEL CORP2 citations73

US11588037B2Feb 21, 2023

Planar transistors with wrap-around gates and wrap-around source and drain contacts

INTEL CORP2 citations73

US11437483B2Sep 6, 2022

Gate-all-around integrated circuit structures having dual nanoribbon channel structures

INTEL CORP2 citations72

US10229866B2Mar 12, 2019

On-chip through-body-via capacitors and techniques for forming same

INTEL CORP4 citations72

US9947585B2Apr 17, 2018

Multi-gate transistor with variably sized fin

INTEL CORP5 citations72

US12249622B2Mar 11, 2025

Nanoribbon thick gate devices with differential ribbon spacing and width for SOC applications

INTEL CORP1 citations63

US12148757B2Nov 19, 2024

Integration of Si-based transistors with non-Si technologies by semiconductor regrowth over an insulator material

INTEL CORP0 citations62

US12027613B2Jul 2, 2024

III-N transistor arrangements for reducing nonlinearity of off-state capacitance

INTEL CORP0 citations62

US11881511B2Jan 23, 2024

Enhancement-depletion cascode arrangements for enhancement mode III-N transistors

INTEL CORP0 citations62

US11450617B2Sep 20, 2022

Transmission line structures for III-N devices

INTEL CORP0 citations62

US11264329B2Mar 1, 2022

Semiconductor device having metal interconnects with different thicknesses

INTEL CORP0 citations62

US10964690B2Mar 30, 2021

Resistor between gates in self-aligned gate edge architecture

INTEL CORP1 citations62

US10903372B2Jan 26, 2021

Metal-oxide-polysilicon tunable resistor for flexible circuit design and method of fabricating same

INTEL CORP0 citations62

US12453145B2Oct 21, 2025

Single gated 3D nanowire inverter for high density thick gate SoC applications

INTEL CORP0 citations61

US12349411B2Jul 1, 2025

Gate-all-around integrated circuit structures having dual nanoribbon channel structures

INTEL CORP0 citations61

US11862703B2Jan 2, 2024

Gate-all-around integrated circuit structures having dual nanoribbon channel structures

INTEL CORP0 citations61

US11791380B2Oct 17, 2023

Single gated 3D nanowire inverter for high density thick gate SOC applications

INTEL CORP0 citations61

US11581313B2Feb 14, 2023

Integration of III-N transistors and non-III-N transistors by semiconductor regrowth

INTEL CORP0 citations61

US10505034B2Dec 10, 2019

Vertical transistor using a through silicon via gate

INTEL CORP1 citations61

US11610971B2Mar 21, 2023

Cap layer on a polarization layer to preserve channel sheet resistance

INTEL CORP0 citations60

US11652143B2May 16, 2023

III-N transistors integrated with thin-film transistors having graded dopant concentrations and/or composite gate dielectrics

INTEL CORP0 citations59

US11688788B2Jun 27, 2023

Transistor gate structure with hybrid stacks of dielectric material

INTEL CORP0 citations57

US11670709B2Jun 6, 2023

III-N transistors with local stressors for threshold voltage control

INTEL CORP0 citations52

US11587924B2Feb 21, 2023

Integration of passive components in III-N devices

INTEL CORP0 citations52

US10158034B2Dec 18, 2018

Through silicon via based photovoltaic cell

INTEL CORP0 citations52

US9911815B2Mar 6, 2018

Extended-drain structures for high voltage field effect transistors

INTEL CORP1 citations52

US12568682B2Mar 3, 2026

Nanoribbon thick gate device with hybrid dielectric tuning for high breakdown and VT modulation

INTEL CORP0 citations51

US12040395B2Jul 16, 2024

High voltage extended-drain MOS (EDMOS) nanowire transistors

INTEL CORP0 citations51

US11737362B2Aug 22, 2023

Harvesting energy in an integrated circuit using the seebeck effect

INTEL CORP0 citations51

US11502191B2Nov 15, 2022

Transistors with backside field plate structures

INTEL CORP0 citations51

US11996403B2May 28, 2024

ESD diode solution for nanoribbon architectures

INTEL CORP0 citations50

US11626513B2Apr 11, 2023

Antenna gate field plate on 2DEG planar FET

INTEL CORP0 citations49

NIDHI NIDHI

Patents

Monolithic integration of high voltage transistors and low voltage non-planar transistors

III-N tunnel device architectures and high frequency mixers employing a III-N tunnel device

Co-integrated high performance nanoribbon transistors with high voltage thick gate finFET devices

Planar transistors with wrap-around gates and wrap-around source and drain contacts

Gate-all-around integrated circuit structures having dual nanoribbon channel structures

On-chip through-body-via capacitors and techniques for forming same

Multi-gate transistor with variably sized fin

Nanoribbon thick gate devices with differential ribbon spacing and width for SOC applications

Integration of Si-based transistors with non-Si technologies by semiconductor regrowth over an insulator material

III-N transistor arrangements for reducing nonlinearity of off-state capacitance

Superlattice FINFET with tunable drive current capability

III-N transistors with contacts of modified widths

Semiconductor device having metal interconnects with different thicknesses

E-D mode 2DEG FET with gate spacer to locally tune VT and improve breakdown

Charge-induced threshold voltage tuning in III-N transistors

Transistors with ion- or fixed charge-based field plate structures

Enhancement-depletion cascode arrangements for enhancement mode III-N transistors

Transmission line structures for III-N devices

Semiconductor device having metal interconnects with different thicknesses

Resistor between gates in self-aligned gate edge architecture

Metal-oxide-polysilicon tunable resistor for flexible circuit design and method of fabricating same

Single gated 3D nanowire inverter for high density thick gate SoC applications

Gate-all-around integrated circuit structures having dual nanoribbon channel structures

Gate-all-around integrated circuit structures having dual nanoribbon channel structures

Single gated 3D nanowire inverter for high density thick gate SOC applications

Integration of III-N transistors and non-III-N transistors by semiconductor regrowth

Vertical transistor using a through silicon via gate

Cap layer on a polarization layer to preserve channel sheet resistance

III-N transistors integrated with thin-film transistors having graded dopant concentrations and/or composite gate dielectrics

Transistor gate structure with hybrid stacks of dielectric material

III-N transistors with local stressors for threshold voltage control

Integration of passive components in III-N devices

Through silicon via based photovoltaic cell

Extended-drain structures for high voltage field effect transistors

Nanoribbon thick gate device with hybrid dielectric tuning for high breakdown and VT modulation

High voltage extended-drain MOS (EDMOS) nanowire transistors

Harvesting energy in an integrated circuit using the seebeck effect

Transistors with backside field plate structures

ESD diode solution for nanoribbon architectures

Antenna gate field plate on 2DEG planar FET