Inventor

LIN CHUN-CHIEH

TW126 patents

⚠️ This page may combine multiple inventors who share the name “LIN CHUN-CHIEH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIN CHUN-CHIEH

TAIWAN SEMICONDUCTOR MFG

Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit

Complementary metal oxide semiconductor transistor technology using selective epitaxy of a strained silicon germanium layer

Strained-channel transistor structure with lattice-mismatched zone

Strained-channel semiconductor structure and method of fabricating the same

Method of forming DRAM capacitors with protected outside crown surface for more robust structures

Strain balanced structure with a tensile strained silicon channel and a compressive strained silicon-germanium channel for CMOS performance enhancement

SOI MOSFET with multi-sided source/drain silicide

Strain balanced structure with a tensile strained silicon channel and a compressive strained silicon-germanium channel for CMOS performance enhancement

Method of fabricating a wafer with strained channel layers for increased electron and hole mobility for improving device performance

Complementary metal oxide semiconductor transistor technology using selective epitaxy of a strained silicon germanium layer

Heterostructure resistor and method of forming the same

Method for forming a device having multiple silicide types

Semiconductor device with high-k gate dielectric

Complementary metal oxide semiconductor transistor technology using selective epitaxy of a strained silicon germanium layer

Recessed polysilicon gate structure for a strained silicon MOSFET device

Inflected magnetoresistive structures and memory cells having inflected magnetoresistive structures

Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit

Epitaxy layer and method of forming the same

Relaxed silicon germanium substrate with low defect density

Transistor with a strained region and method of manufacture

Semiconductor device substrate with embedded capacitor

Method for forming devices with multiple spacer widths

MOS devices with improved source/drain regions with SiGe

Method for forming a device having multiple silicide types

In-situ deposition for cu hillock suppression

Strained-channel semiconductor structure and method for fabricating the same

Epitaxy layer and method of forming the same

Methods of forming semiconductor devices with high-k gate dielectric

Method of forming a protected crown capacitor structure utilizing the outside crown surface to increase capacitance

TAIWAN SEMICONDUCTOR MFG CO LTD

Semiconductor device having interconnect layer that includes dielectric segments interleaved with metal components

Method of forming an interconnect structure

Interconnect structure including a conductive feature and a barrier layer on sidewalls and a bottom surface of the conductive feature and method of forming the same

Post-CMP cleaning and apparatus

Method of forming an interconnect structure having a carbon-containing barrier layer

Semiconductor device having interconnect layer that includes dielectric segments interleaved with metal components

Two step metallization formation

Diffusion barrier for semiconductor device and method

VERTEX PHARMA

Modulators of cystic fibrosis transmembrane conductance regulator

Modulators of cystic fibrosis transmembrane conductance regulator

Modulators of cystic fibrosis transmembrane conductance regulator

Modulators of cystic fibrosis transmembrane conductance regulator

Modulators of cystic fibrosis transmembrane conductance regulator

APPLE INC

Displays with reduced temperature luminance sensitivity

Displays with reduced temperature luminance sensitivity

Mirrored pixel arrangement to mitigate column crosstalk

CHEN CHIEN-AN

Mechanisms of forming damascene interconnect structures

AHMED RAFI

Optimization technique of generalized disjunctive semi/anti join

ROUNDTOP MACHINERY IND CO LTD

Direct drive spindle, machining center and methods of fabricating the same

LIN CHUN CHIEH

Gap filling method for dual damascene process

AU OPTRONICS CORP

Display apparatus and pixel driving method with current compensation function