Inventor

VENKATARAMANI SWAGATH

US32 patents

⚠️ This page may combine multiple inventors who share the name “VENKATARAMANI SWAGATH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

VENKATARAMANI SWAGATH

IBM

System-aware selective quantization for performance optimized distributed deep learning

Optimized hierarchical scratchpads for enhanced artificial intelligence accelerator core utilization

Sparse systolic array design

Multichannel memory to augment local memory

Hybrid data-model parallelism for efficient deep learning

Dynamically resizing minibatch in neural network execution

Bi-scaled deep neural networks

Self-evaluating array of memory

Self-evaluating array of memory

Reducing the cost of n modular redundancy for neural networks

Padding input data for artificial intelligence accelerators

Programmable data delivery by load and store agents on a processing chip interfacing with on-chip memory components and directing data to external memory components

Facilitating neural network efficiency

Stickification using anywhere padding to accelerate data manipulation

Single function to perform combined matrix multiplication and bias add operations

Method to map convolutional layers of deep neural network on a plurality of processing elements with SIMD execution units, private memories, and connected as a 2D systolic processor array

Low precision deep neural network enabled by compensation instructions

Deep neural network performance analysis on shared memory accelerator systems

Training convolution neural network on analog resistive processing unit system

System and method for consensus-based representation and error checking for neural networks

Low-overhead error prediction and preemption in deep neural network using apriori network statistics

Processor and memory transparent convolutional lowering and auto zero padding for deep neural network implementations

Exploiting fine-grained structured weight sparsity in systolic arrays

Programmable multicast protocol for ring-topology based artificial intelligence systems

MICROSOFT TECHNOLOGY LICENSING LLC

Scalable-effort classifiers for energy-efficient machine learning

Scalable-effort classifiers for energy-efficient machine learning

Methods and systems for low-energy image classification

PURDUE RESEARCH FOUNDATION

Approximate cache memory

Approximate cache memory

Tomographic reconstruction system

INTEL CORP

Apparatuses, methods, and systems for access synchronization in a shared memory

Apparatuses, methods, and systems for access synchronization in a shared memory