Inventor

GUZEK JOHN S

US72 patents

⚠️ This page may combine multiple inventors who share the name “GUZEK JOHN S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GUZEK JOHN S

INTEL CORP

Localized high density substrate routing

Bumpless build-up layer package including an integrated heat spreader

Bumpless build-up layer package including an integrated heat spreader

Localized high density substrate routing

Method of stiffening coreless package substrate

Integrated circuit package with low modulus layer and capacitor/interposer

Embedded die on interposer packages

Embedded semiconductive chips in reconstituted wafers, and systems containing same

Localized high density substrate routing

Integrated circuit package stack

Embedded semiconductive chips in reconstituted wafers, and systems containing same

Embedded semiconductive chips in reconstituted wafers, and systems containing same

Embedded semiconductive chips in reconstituted wafers, and systems containing same

Bumpless build-up layer package including an integrated heat spreader

Organic substrates with integral thin-film capacitors, methods of making same, and systems containing same

Method of making an electromagnetic interference shield for semiconductor chip packages

Microelectronic package and method of manufacturing same

Localized high density substrate routing

Semiconductor package having spacer layer

Electro-magnetic interference (EMI) shielding techniques and configurations

BBUL top side substrate layer enabling dual sided silicon interconnect and stacking flexibility

Method of forming a microelectronic device package

Semiconductor package with embedded die and its methods of fabrication

Method of forming molded panel embedded die structure

Logic die and other components embedded in build-up layers

Logic die and other components embedded in build-up layers

Embedded semiconductive chips in reconstituted wafers, and systems containing same

Embedded die on interposer packages

Embedded die on interposer packages

Embedded semiconductive chips in reconstituted wafers, and systems containing same

Microelectronic structures having laminated or embedded glass routing structures for high density packaging

Microelectronic structures having laminated or embedded glass routing structures for high density packaging

Localized high density substrate routing

GUZEK JOHN S

Mold compounds in improved embedded-die coreless substrates, and processes of forming same

System-in-package using embedded-die coreless substrates, and processes of forming same

Die-stacking using through-silicon vias on bumpless build-up layer substrates including embedded-dice, and processes of forming same

Microelectronic device and method of manufacturing same

GANESAN SANKA

Package on package architecture and method for making

Package-on-package interconnect stiffener

TEH WENG HONG

Multi die package having a die and a spacer layer in a recess

Secondary device integration into coreless microelectronic device packages

SANKMAN ROBERT L

Embedded semiconductive chips in reconstituted wafers, and systems containing same

STARKSTON ROBERT

Localized high density substrate routing

PALMER ERIC C

Package on package using a bump-less build up layer (BBUL) package

MALATKAR PRAMOD

Packaged semiconductor die with bumpless die-package interface for bumpless build-up layer (BBUL) packages

SWAMINATHAN RAJASEKARAN

Magnetic microelectronic device attachment

NALLA RAVI K

Forming functionalized carrier structures with coreless packages

MAHAJAN RAVINDRANATH V

Electromagnetic interference shield for semiconductor chip packages

PILLARISETTY RAVI

Passivation layer for flexible display

EXO IMAGING INC

Semiconductor package having spacer layer