US9691711B2ActiveUtilityA1

Method of making an electromagnetic interference shield for semiconductor chip packages

93
Assignee: INTEL CORPPriority: Mar 28, 2014Filed: Feb 26, 2016Granted: Jun 27, 2017
Est. expiryMar 28, 2034(~7.7 yrs left)· nominal 20-yr term from priority
H10W 90/724H10W 74/10H10W 74/00H10W 72/9413H10W 72/241H10W 74/019H10W 74/01H10W 72/0198H10W 70/09H10W 42/284H10W 42/276H10W 42/20H01L 2224/97H01L 2924/15311H01L 2224/12105H01L 2924/157H01L 24/96H01L 2924/14H01L 2224/04105H01L 2924/1815H01L 23/552H01L 24/16H01L 2924/15747H01L 2924/12042H01L 24/19H01L 21/568H01L 2924/181H01L 2224/16225H01L 21/56H01L 2224/81H01L 2924/1421H01L 2924/00
93
PatentIndex Score
9
Cited by
12
References
18
Claims

Abstract

An electromagnetic interference shield is described for semiconductor chip packages. In some embodiments, a mold compound is formed over a semiconductor die, the die being over a front side redistribution layer on a side opposite the mold compound, the redistribution layer extending past the die and the mold compound extending around the die to contact the redistribution layer. A plurality of vias are formed in the mold compound vertically toward the redistribution layer, the vias being outside of the die, wherein the bottoms of the vias are over a ground layer of the front side redistribution layer. A continuous conductive shielding film is applied over the mold compound and into the vias, wherein the shielding film in some of the vias directly connects to the ground layer and wherein the shielding film in some of the vias does not directly connect to the ground layer, the redistribution layer connecting the metal film to an external ground so that the vias form a shield.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method comprising:
 forming a mold compound over a semiconductor die, the die being over a front side redistribution layer on a side opposite the mold compound, the redistribution layer extending past the die and the mold compound extending around the die to contact the redistribution layer; 
 forming a plurality of vias around the die in the mold compound vertically toward the redistribution layer, the vias being outside of the die with gaps between the vias of the plurality of vias, wherein the bottoms of the vias are over a ground layer of the front side redistribution layer, the via gaps configured to form a Faraday cage around the die; and 
 applying a continuous conductive shielding film over the mold compound and into the vias, wherein the shielding film in some of the vias directly connects to the ground layer and wherein the shielding film in some of the vias does not directly connect to the ground layer, the redistribution layer connecting the shielding film to an external ground so that the vias form a shield. 
 
     
     
       2. The method of  claim 1 , further comprising finishing the mold compound and the redistribution layer to form a package. 
     
     
       3. The method of  claim 2 , wherein finishing comprises attaching solder balls to the redistribution layer opposite the die to connect to a system board. 
     
     
       4. The method of  claim 3 , wherein the solder balls comprise a panel level ball grid array. 
     
     
       5. The method of  claim 3 , further comprising attaching the package to a system board through the solder balls. 
     
     
       6. The method of  claim 5 , further comprising attaching a radio frequency die package to the system board. 
     
     
       7. The method of  claim 1 , wherein forming vias comprises laser drilling the mold compound. 
     
     
       8. The method of  claim 1 , wherein the die is rectangular having four sides and forming vias comprises forming vias in rows on all four sides of the die. 
     
     
       9. The method of  claim 1 , wherein forming vias comprises forming two rows of vias along each side of the die wherein the vias of each row alternate in position. 
     
     
       10. The method of  claim 9 , wherein the vias are in straight rows along each of the four sides of the die. 
     
     
       11. The method of  claim 9 , wherein the vias are further in a second straight row along each of the four sides of the die. 
     
     
       12. The method of  claim 11 , wherein the vias of the second row alternate in position with the vias of the first row. 
     
     
       13. The method of  claim 1 , wherein the front side redistribution layer has a first dielectric layer closest to the chip, a conductor layer with metal pathways, and a solder stop layer, and wherein the die is connected to the metal pathways by vias through the first dielectric layer. 
     
     
       14. The method of  claim 1 , wherein the front side redistribution layer is a package substrate. 
     
     
       15. The method of  claim 1 , wherein the redistribution layer is a bumpless build-up layer. 
     
     
       16. The method of  claim 1 , wherein the conductive shielding film is titanium or copper. 
     
     
       17. The method of  claim 1 , wherein the mold compound is formed of a material selected from the group comprising plastic, thermosetting polymer, and epoxy resin. 
     
     
       18. The method of  claim 1 , wherein the mold compound serves as a package cover and completely encloses the die.

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