Inventor

LIM KWAN-YONG

US104 patents

⚠️ This page may combine multiple inventors who share the name “LIM KWAN-YONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIM KWAN-YONG

GLOBALFOUNDRIES INC

Methods of forming single and double diffusion breaks on integrated circuit products comprised of FinFET devices and the resulting products

Devices and methods of forming VFET with self-aligned replacement metal gates aligned to top spacer post top source drain EPI

Methods of forming replacement gate structures and bottom and top source/drain regions on a vertical transistor device

Methods of forming diffusion breaks on integrated circuit products comprised of FinFET devices and the resulting products

Self-aligned gate-first VFETs using a gate spacer recess

Methods of forming vertical transistor devices with self-aligned top source/drain conductive contacts

Methods of forming vertical transistor devices with self-aligned replacement gate structures

Single and double diffusion breaks on integrated circuit products comprised of FinFET devices

Methods of forming a gate structure on a vertical transistor device

Vertical channel transistor-based semiconductor memory structure

Vertical-transport field-effect transistors with a damascene gate strap

Formation of bottom junction in vertical FET devices

Vertical SRAM structure with cross-coupling contacts penetrating through common gates to bottom S/D metal contacts

Active area shapes reducing device size

Methods of forming replacement gate structures on transistor devices with a shared gate structure and the resulting products

Methods of fabricating fin structures of uniform height

Raised source/drain EPI with suppressed lateral EPI overgrowth

Methods, apparatus and system for providing source-drain epitaxy layer with lateral over-growth suppression

Vertical transistor static random access memory cell

Method of manufacturing a vertical SRAM with cross-coupled contacts penetrating through common gate structures

Integration of vertical field-effect transistors and saddle fin-type field effect transistors

Active area shapes reducing device size

Methods of forming fin cut regions by oxidizing fin portions

Formation of bottom junction in vertical FET devices

HYNIX SEMICONDUCTOR INC

Method of manufacturing semiconductor devices with titanium aluminum nitride work function

Semiconductor device with vertical channel transistor and method for fabricating the same

Semiconductor device having a fin transistor and method for fabricating the same

Non-volatile memory device with conductive sidewall spacer and method for fabricating the same

CMOS of semiconductor device and method for manufacturing the same

CMOS of semiconductor device and method for manufacturing the same

Method for forming multiple gate oxide layers

Cmos of semiconductor device and method for manufacturing the same

Method for fabricating transistor with polymetal gate electrode

Method for fabricating semiconductor device by using radical oxidation

Method for fabricating semiconductor device with interface barrier

Method of fabricating a dual polysilicon gate of a semiconductor device with a multi-plane channel

Semiconductor device with multiple gate dielectric layers and method for fabricating the same

Method of forming a metal gate in a semiconductor device using atomic layer deposition process

Method of forming tungsten polymetal gate having low resistance

Semiconductor device with gate stack structure

Method for fabricating semiconductor device with use of partial gate recessing process

Method of forming gates in semiconductor devices

Method for forming a gate for semiconductor devices

TEXAS INSTRUMENTS INC

Silicide formation due to improved SiGe faceting

Embedded polysilicon resistor in integrated circuits formed by a replacement gate process

Method to form silicide and contact at embedded epitaxial facet

SUNG MIN-GYU

Semiconductor device having vertical channel transistor and method for fabricating the same

Semiconductor device with vertical channel transistor

KIM SEOK-HOON

Methods of forming transistors and CMOS semiconductor devices using an SMT technique

IBM

Vertical channel field-effect transistor (FET) process compatible long channel transistors