Inventor

JONES DARREN M

US17 patents

⚠️ This page may combine multiple inventors who share the name “JONES DARREN M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JONES DARREN M

MIPS TECH INC

Apparatus, method, and instruction for software management of multiple computational contexts in a multithreaded microprocessor

System, method and computer program product for web-based integrated circuit design

Instruction/skid buffers in a multithreading microprocessor that store dispatched instructions to avoid re-fetching flushed instructions

Leaky-bucket thread scheduler in a multithreading microprocessor

Prioritizing thread selection partly based on stall likelihood providing status information of instruction operand register usage at pipeline stages

Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency

Apparatus and method for automatic low power mode invocation in a multi-threaded processor

Apparatus and method for software specified power management performance using low power virtual threads

Configurable co-processor interface

Interfacing external thread prioritizing policy enforcing logic with customer modifiable register to processor internal scheduler

Smart memory based synchronization controller for a multi-threaded multiprocessor SoC

Microprocessor instructions for efficient bit stream extractions

Apparatus and method for controlling the exclusivity mode of a level-two cache

Microprocessor instruction using address index values to enable access of a virtual buffer in circular fashion

KINTER RYAN C

Coherent instruction cache utilizing cache-op execution resources

JONES DARREN M

Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency

KIM JINWOO

Apparatus and method for controlling the exclusivity mode of a level-two cache