Inventor

WANG ZHONGZE

US130 patents

⚠️ This page may combine multiple inventors who share the name “WANG ZHONGZE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WANG ZHONGZE

MICRON TECHNOLOGY INC

Channel implant through gate polysilicon

Transistor structures and processes for forming same

Methods of fabricating a dielectric plug in MOSFETS to suppress short-channel effects

FET having epitaxial silicon growth

Method of forming a field effect transistor

Semiconductor fuses, methods of using the same, methods of making the same, and semiconductor devices containing the same

Integrated circuitry and semiconductor processing method of forming field effect transistors

Method for reducing the effective thickness of gate oxides by nitrogen implantation and anneal

Wafer bonding method of forming silicon-on-insulator comprising integrated circuitry

MOSFETs including a dielectric plug to suppress short-channel effects

Methods of forming transistor devices

Methods of forming silicon-on-insulator comprising integrated circuitry, and wafer bonding methods of forming silicon-on-insulator comprising integrated circuitry

Suppression of cross diffusion and gate depletion

Cross-diffusion resistant dual-polycide semiconductor structure and method

Methods of passivating an oxide surface subjected to a conductive material anneal

MOS transistors with nitrogen in the gate oxide of the p-channel transistor

Semiconductor processing method of forming field effect transistors

P-type FET in a CMOS with nitrogen atoms in the gate dielectric

Method of using high-k dielectric materials to reduce soft errors in SRAM memory cells, and a device comprising same

Low dose super deep source/drain implant

Dielectric plug in mosfets to suppress short-channel effects

Methods for making semiconductor structures having high-speed areas and high-density areas

Intermediate semiconductor device having nitrogen concentration profile

Intermediate semiconductor device having nitrogen concentration profile

Methods for making semiconductor structures having high-speed areas and high-density areas

Method of forming a field effect transistor with halo implant regions

FET having epitaxial silicon growth

Method of forming a field effect transistor

Methods of making semiconductor fuses

Integrated transistor circuitry

Method of forming silicon-on-insulator comprising integrated circuitry

Semiconductor fuses and semiconductor devices containing the same

Silicon-on-insulator comprising integrated circuitry

Apparatus and method of increasing sram cell capacitance with metal fill

Transistor formation for semiconductor devices

Method of passivating an oxide surface subjected to a conductive material anneal

Sidewall strap for complementary semiconductor structures and method of making same

Semiconductor fuses, methods of using the same, methods of making the same, and semiconductor devices containing the same

QUALCOMM INC

Memory device with adaptive voltage scaling based on error information

Merging lithography processes for gate patterning

High dielectric constant/metal gate (HK/MG) compatible floating gate (FG)/ferroelectric dipole non-volatile memory

Three-port bit cell having increased width

Metal layers for a three-port bit cell

Dual write wordline memory cell

Static random access memories (SRAM) with read-preferred cell structures, write drivers, related systems, and methods

Grounding dummy gate in scaled layout design

Testing a memory device having field effect transistors subject to threshold voltage shifts caused by bias temperature instability

Parallel processing of a convolutional layer of a neural network with compute-in-memory array

WANG ZHONGZE

Programmable tracking circuit for tracking semiconductor memory read current

JUNG SEONG-OOK

Low-power 5T SRAM with improved stability and reduced bitcell size