Integrated circuitry and semiconductor processing method of forming field effect transistors

Abstract

In accordance with an aspect of the invention, a semiconductor processing method of forming field effect transistors includes forming a first gate dielectric layer over a first area configured for forming p-type field effect transistors and a second area configured for forming n-type field effect transistors, both areas on a semiconductor substrate. The first gate dielectric layer is silicon dioxide having a nitrogen concentration of 0.1% molar to 10.0% molar within the first gate dielectric layer, the nitrogen atoms being higher in concentration within the first gate dielectric layer at one elevational location as compared to another elevational location. The first gate dielectric layer is removed from over the second area while leaving the first gate dielectric layer over the first area, and a second gate dielectric layer is formed over the second area. The second gate dielectric layer is a silicon dioxide material substantially void of nitrogen atoms. Transistor gates are formed over the first and second gate dielectric layers, and then p-type source/drain regions are formed proximate the transistor gates in the first area and n-type source/drain regions are formed proximate the transistor gates in the second area.

What is claimed is: 
     
       1. A semiconductor processing method of forming field effect transistors comprising: forming a first gate dielectric layer over first and second areas of a semiconductor substrate, the first area being configured for forming p-type field effect transistors, the second area being configured for forming n-type field effect transistors, the first gate dielectric layer comprising silicon dioxide having nitrogen atoms therein, the nitrogen atoms being higher in concentration within the first gate dielectric layer at one elevational location as compared to another elevational location and at a concentration of from 0.1% molar to 10.0% molar, and the one elevational location of nitrogen atoms being located proximate an interface of the first gate dielectric layer with the semiconductor substrate;   removing the first gate dielectric layer from over the second area and leaving the first gate dielectric layer over the first area;   after the removing, forming a second gate dielectric layer over the second area, the second gate dielectric layer comprising silicon dioxide proximate an interface of the second gate dielectric layer with the semiconductor substrate which is substantially void of nitrogen atoms;   forming transistor gates over the first and second gate dielectric layers, the transistor gate over the first gate dielectric layer comprising p-type conductivity dopant material and the transistor gate over the second gate dielectric layer comprising n-type conductivity dopant material, and the nitrogen atom concentration in the first gate dielectric layer being effective to restrict diffusion of the p-type conductivity dopant material from the transistor gate over the first gate dielectric layer into the semiconductor substrate; and   forming p-type source/drain regions proximate the transistor gates in the first area and n-type source/drain regions proximate the transistor gates in the second area.