Inventor
MENON SANKARAN M
US24 patents
⚠️ This page may combine multiple inventors who share the name “MENON SANKARAN M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
14 patentsUS7568141B2Jul 28, 2009
Method and apparatus for testing embedded cores
INTEL CORP19 citations90
US9535117B2Jan 3, 2017
System debug using an all-in-one connector
INTEL CORP13 citations83
US9568547B2Feb 14, 2017
Method, apparatus and system for dynamic bandwidth management in systems
INTEL CORP9 citations80
US11157374B2Oct 26, 2021
Technologies for efficient reliable compute operations for mission critical applications
INTEL CORP2 citations72
US10824530B2Nov 3, 2020
System, apparatus and method for non-intrusive platform telemetry reporting using an all-in-one connector
INTEL CORP3 citations70
US10996283B2May 4, 2021
Apparatus and method to debug a voltage regulator
INTEL CORP1 citations67
US11709202B2Jul 25, 2023
Interfaces for wireless debugging
INTEL CORP0 citations61
US11698412B2Jul 11, 2023
Device, system and method to support communication of test, debug or trace information with an external input/output interface
INTEL CORP0 citations61
US11193973B2Dec 7, 2021
Device, system and method to support communication of test, debug or trace information with an external input/output interface
INTEL CORP0 citations61
US11686780B2Jun 27, 2023
Apparatus and method to debug a voltage regulator
INTEL CORP0 citations57
US9784791B2Oct 10, 2017
Apparatus and method to debug a voltage regulator
INTEL CORP1 citations57
US12183412B2Dec 31, 2024
Method and apparatus for enabling multiple return material authorizations (RMAs) on an integrated circuit device
INTEL CORP0 citations56
US10247773B2Apr 2, 2019
Systems and methods for wireless device testing
INTEL CORP1 citations51
US10060966B2Aug 28, 2018
Method and apparatus for enhancing guardbands using “in-situ” silicon measurements
INTEL CORP0 citations50
MENON SANKARAN M
5 patentsUS8924786B2Dec 30, 2014
No-touch stress testing of memory I/O interfaces
MENON SANKARAN M9 citations78
US9201448B2Dec 1, 2015
Observing embedded signals of varying clock domains by fowarding signals within a system on a chip concurrently with a logic module clock signal
MENON SANKARAN M4 citations71
US9632895B2Apr 25, 2017
Apparatus, system and method for a common unified debug architecture for integrated circuits and SoCs
MENON SANKARAN M5 citations66
US9043649B2May 26, 2015
Method and apparatus for output of high-bandwidth debug data/traces in ICS and SoCs using embedded high speed debug
MENON SANKARAN M3 citations59
US8904253B2Dec 2, 2014
Method and apparatus for testing I/O boundary scan chain for SoC's having I/O's powered off by default
MENON SANKARAN M2 citations52
INTEL IP CORP
4 patentsUS10845413B2Nov 24, 2020
Interfaces for wireless debugging
INTEL IP CORP3 citations71
US10718812B2Jul 21, 2020
Device, system and method to support communication of test, debug or trace information with an external input/output interface
INTEL IP CORP1 citations71
US10054636B2Aug 21, 2018
Device, system and method to support communication of test, debug or trace information with an external input/output interface
INTEL IP CORP2 citations71
US9989592B2Jun 5, 2018
Interfaces for wireless debugging
INTEL IP CORP2 citations71