Inventor
IYER SUNDAR
US50 patents
⚠️ This page may combine multiple inventors who share the name “IYER SUNDAR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CISCO TECH INC
27 patentsUS7657706B2Feb 2, 2010
High speed memory and input/output processor subsystem for efficiently allocating and using high-speed memory and slower-speed memory
CISCO TECH INC107 citations96
US10554483B2Feb 4, 2020
Network policy analysis for networks
CISCO TECH INC8 citations84
US9520178B2Dec 13, 2016
Methods and apparatus for designing and constructing dual write memory circuits with voltage assist
CISCO TECH INC5 citations84
US10505817B2Dec 10, 2019
Automatically determining an optimal amount of time for analyzing a distributed network environment
CISCO TECH INC6 citations83
US10498608B2Dec 3, 2019
Topology explorer
CISCO TECH INC9 citations83
US11645131B2May 9, 2023
Distributed fault code aggregation across application centric dimensions
CISCO TECH INC5 citations74
US10505816B2Dec 10, 2019
Semantic analysis to detect shadowing of rules in a model of network intents
CISCO TECH INC5 citations73
US10904101B2Jan 26, 2021
Shim layer for extracting and prioritizing underlying rules for modeling network intents
CISCO TECH INC2 citations72
US10826788B2Nov 3, 2020
Assurance of quality-of-service configurations in a network
CISCO TECH INC2 citations72
US10623264B2Apr 14, 2020
Policy assurance for service chaining
CISCO TECH INC5 citations72
US10560328B2Feb 11, 2020
Static network policy analysis for networks
CISCO TECH INC4 citations72
US9147466B2Sep 29, 2015
Methods and apparatus for designing and constructing dual write memory circuits with voltage assist
CISCO TECH INC2 citations63
US12524287B2Jan 13, 2026
Distributed fault code aggregation across application centric dimensions
CISCO TECH INC0 citations62
US11750463B2Sep 5, 2023
Automatically determining an optimal amount of time for analyzing a distributed network environment
CISCO TECH INC0 citations62
US11563645B2Jan 24, 2023
Shim layer for extracting and prioritizing underlying rules for modeling network intents
CISCO TECH INC0 citations62
US11463316B2Oct 4, 2022
Topology explorer
CISCO TECH INC0 citations62
US11178009B2Nov 16, 2021
Static network policy analysis for networks
CISCO TECH INC1 citations62
US11121927B2Sep 14, 2021
Automatically determining an optimal amount of time for analyzing a distributed network environment
CISCO TECH INC0 citations62
US11824728B2Nov 21, 2023
Check-pointing ACI network state and re-execution from a check-pointed state
CISCO TECH INC0 citations59
US10873509B2Dec 22, 2020
Check-pointing ACI network state and re-execution from a check-pointed state
CISCO TECH INC1 citations59
US10042573B2Aug 7, 2018
High speed memory systems and methods for designing hierarchical memory systems
CISCO TECH INC1 citations52
US9280464B2Mar 8, 2016
System and method for simultaneously storing and reading data from a memory system
CISCO TECH INC0 citations52
US10437641B2Oct 8, 2019
On-demand processing pipeline interleaved with temporal processing pipeline
CISCO TECH INC0 citations51
US9678669B2Jun 13, 2017
Hierarchical memory system compiler
CISCO TECH INC0 citations51
US9466395B2Oct 11, 2016
Methods and apparatus for testing and repairing digital memory circuits
CISCO TECH INC0 citations51
US9390212B2Jul 12, 2016
Methods and apparatus for synthesizing multi-port memory circuits
CISCO TECH INC1 citations51
US9165687B2Oct 20, 2015
Methods and apparatus for testing and repairing digital memory circuits
CISCO TECH INC0 citations51
IYER SUNDAR
12 patentsUS8760958B2Jun 24, 2014
Methods and apparatus for designing and constructing multi-port memory circuits with voltage assist
IYER SUNDAR18 citations92
US8433880B2Apr 30, 2013
System and method for storing data in a virtualized high speed memory system
IYER SUNDAR7 citations84
US8902672B2Dec 2, 2014
Methods and apparatus for designing and constructing multi-port memory circuits
IYER SUNDAR13 citations83
USRE45097EAug 26, 2014
High speed memory and input/output processor subsystem for efficiently allocating and using high-speed memory and slower-speed memory
IYER SUNDAR11 citations82
US9293187B2Mar 22, 2016
Methods and apparatus for refreshing digital memory circuits
IYER SUNDAR5 citations73
US9058860B2Jun 16, 2015
Methods and apparatus for synthesizing multi-port memory circuits
IYER SUNDAR4 citations72
US9274586B2Mar 1, 2016
Intelligent memory interface
IYER SUNDAR6 citations70
US9442846B2Sep 13, 2016
High speed memory systems and methods for designing hierarchical memory systems
IYER SUNDAR2 citations62
US8677072B2Mar 18, 2014
System and method for reduced latency caching
IYER SUNDAR3 citations62
US8504796B2Aug 6, 2013
System and method for storing data in a virtualized high speed memory system with an integrated memory mapping table
IYER SUNDAR3 citations62
US8266408B2Sep 11, 2012
System and method for storing data in a virtualized high speed memory system
IYER SUNDAR2 citations62
US8589851B2Nov 19, 2013
Intelligent memory system compiler
IYER SUNDAR0 citations51
PMC SIERRA
3 patentsUS6691168B1Feb 10, 2004
Method and apparatus for high-speed network rule processing
PMC SIERRA171 citations96
US6457061B1Sep 24, 2002
Method and apparatus for performing internet network address translation
PMC SIERRA129 citations95
US6631466B1Oct 7, 2003
Parallel string pattern searches in respective ones of array of nanocomputers
PMC SIERRA73 citations94