Inventor
LIU HONGZHOU
US29 patents
⚠️ This page may combine multiple inventors who share the name “LIU HONGZHOU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CADENCE DESIGN SYSTEMS INC
24 patentsUS9524365B1Dec 20, 2016
Efficient monte carlo flow via failure probability modeling
CADENCE DESIGN SYSTEMS INC21 citations92
US10528644B1Jan 7, 2020
Estimation and visualization of a full probability distribution for circuit performance obtained with Monte Carlo simulations over scaled sigma sampling
CADENCE DESIGN SYSTEMS INC9 citations84
US9836564B1Dec 5, 2017
Efficient extraction of the worst sample in Monte Carlo simulation
CADENCE DESIGN SYSTEMS INC17 citations84
US9805158B1Oct 31, 2017
Efficient extraction of K-sigma corners from Monte Carlo simulation
CADENCE DESIGN SYSTEMS INC17 citations84
US8954910B1Feb 10, 2015
Device mismatch contribution computation with nonlinear effects
CADENCE DESIGN SYSTEMS INC13 citations84
US8813009B1Aug 19, 2014
Computing device mismatch variation contributions
CADENCE DESIGN SYSTEMS INC8 citations84
US10853550B1Dec 1, 2020
Sampling selection for enhanced high yield estimation in circuit designs
CADENCE DESIGN SYSTEMS INC11 citations83
US6957400B2Oct 18, 2005
Method and apparatus for quantifying tradeoffs for multiple competing goals in circuit design
CADENCE DESIGN SYSTEMS INC15 citations83
US8954908B1Feb 10, 2015
Fast monte carlo statistical analysis using threshold voltage modeling
CADENCE DESIGN SYSTEMS INC17 citations81
US10084476B1Sep 25, 2018
Adaptive lossless compression in analog mixed signal environments
CADENCE DESIGN SYSTEMS INC7 citations77
US10776548B1Sep 15, 2020
Parallel Monte Carlo sampling for predicting tail performance of integrated circuits
CADENCE DESIGN SYSTEMS INC5 citations73
US10325056B1Jun 18, 2019
Failure boundary classification and corner creation for scaled-sigma sampling
CADENCE DESIGN SYSTEMS INC4 citations73
US11562110B1Jan 24, 2023
System and method for device mismatch contribution computation for non-continuous circuit outputs
CADENCE DESIGN SYSTEMS INC2 citations72
US11416660B1Aug 16, 2022
Automatic placement of analog design components with virtual grouping
CADENCE DESIGN SYSTEMS INC5 citations68
US7533358B2May 12, 2009
Integrated sizing, layout, and extractor tool for circuit design
CADENCE DESIGN SYSTEMS INC4 citations62
US12045730B1Jul 23, 2024
System, method, and computer program product for analog and mix-signal circuit placement
CADENCE DESIGN SYSTEMS INC1 citations61
US10909293B1Feb 2, 2021
Sampling selection for enhanced high yield estimation in circuit designs
CADENCE DESIGN SYSTEMS INC1 citations60
US10114916B1Oct 30, 2018
Method and system to accelerate visualization of waveform data
CADENCE DESIGN SYSTEMS INC4 citations60
US10262092B1Apr 16, 2019
Interactive platform to predict mismatch variation and contribution when adjusting component parameters
CADENCE DESIGN SYSTEMS INC1 citations59
US7712055B2May 4, 2010
Designing integrated circuits for yield
CADENCE DESIGN SYSTEMS INC4 citations57
US11790147B1Oct 17, 2023
System and method for routing in an electronic design
CADENCE DESIGN SYSTEMS INC0 citations53
US7346868B2Mar 18, 2008
Method and system for evaluating design costs of an integrated circuit
CADENCE DESIGN SYSTEMS INC1 citations49
US10289764B1May 14, 2019
Parallel extraction of worst case corners
CADENCE DESIGN SYSTEMS INC0 citations41
US10275555B1Apr 30, 2019
Yield estimation for a post-layout circuit design
CADENCE DESIGN SYSTEMS INC0 citations38