Inventor
KING EDWARD C
US25 patents
⚠️ This page may combine multiple inventors who share the name “KING EDWARD C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NCR CORP
12 patentsUS5530941AJun 25, 1996
System and method for prefetching data from a main computer memory into a cache memory
NCR CORP53 citations94
US5420994AMay 30, 1995
Method for reading a multiple byte data element in a memory system with at least one cache and a main memory
NCR CORP21 citations89
US5699529ADec 16, 1997
Work station or similar data processing system including interfacing means to a data channel
NCR CORP22 citations86
US5630098AMay 13, 1997
System and method for interleaving memory addresses between memory banks based on the capacity of the memory banks
NCR CORP13 citations73
US5604883AFeb 18, 1997
Computer memory open page bias method and system
NCR CORP7 citations73
US5835945ANov 10, 1998
Memory system with write buffer, prefetch and internal caches
NCR CORP10 citations72
US5751994AMay 12, 1998
System and method for enhancing computer operation by prefetching data elements on a common bus without delaying bus access by multiple bus masters
NCR CORP14 citations72
US5440754AAug 8, 1995
Work station and method for transferring data between an external bus and a memory unit
NCR CORP12 citations72
US5410656AApr 25, 1995
Work station interfacing means having burst mode capability
NCR CORP11 citations72
US5953740ASep 14, 1999
Computer memory system having programmable operational characteristics based on characteristics of a central processor
NCR CORP7 citations71
US5640536AJun 17, 1997
Work station architecture with selectable CPU
NCR CORP6 citations61
US5428751AJun 27, 1995
Work station including a direct memory access controller and interfacing means to a data channel
NCR CORP4 citations54
CPU TECHNOLOGY INC
8 patentsUS5852564ADec 22, 1998
Method and apparatus for interactively displaying signal information during computer simulation of an electrical circuit
CPU TECHNOLOGY INC22 citations92
US5848276ADec 8, 1998
High speed, direct register access operation for parallel processing units
CPU TECHNOLOGY INC24 citations92
US5761455AJun 2, 1998
Dynamic bus reconfiguration logic
CPU TECHNOLOGY INC31 citations92
US5499376AMar 12, 1996
High speed mask and logical combination operations for parallel processor units
CPU TECHNOLOGY INC22 citations92
US5615356AMar 25, 1997
Method and apparatus for interactively displaying signal information during computer simulation of an electrical circuit
CPU TECHNOLOGY INC15 citations73
US5832253ANov 3, 1998
Multiprocessors system for selectively wire-oring a combination of signal lines and thereafter using one line to control the running or stalling of a selected processor
CPU TECHNOLOGY INC5 citations56
US7630875B2Dec 8, 2009
Automatic time warp for electronic system simulation
CPU TECHNOLOGY INC4 citations54
US5652907AJul 29, 1997
High speed mask and logical combination operations for parallel processor units
CPU TECHNOLOGY INC0 citations51