Method for reading a multiple byte data element in a memory system with at least one cache and a main memory

Abstract

A method for reading a multiple byte data element stored in both first and second memories. Selected bytes of the data element are invalidated in the first memory. Valid bytes from the first memory are combined with remaining bytes from the second memory in response to a read request.

What is desired to be secured by Letters Patent of the United States is as follows: 
     
       1. In a computer system having first and second memories connected to a data bus, said data bus having a width of n bytes so that an n-byte data element may be transmitted in parallel, each of said memories having addressable locations which store n-byte data elements, a method comprising: a. storing first and second n-byte data elements having a common address in first and second locations in said first and second memories, respectively; and   b. responding to a first read request by selecting bytes from each of said first and second data elements and transferring the selected bytes at the same time from said first and second memories to said bus.   
     
     
       2. The method of claim 1, further comprising prior to step "b": designating each byte of said first data element in said first memory as valid or invalid;   wherein only valid bytes from the first data element are selected in step "b".   
     
     
       3. The method of claim 2, wherein said system includes a bus master connected to said bus, further comprising prior to step "b": designating selected bytes in said first memory as dirty;   wherein data bytes are designated as dirty when they are written into said first memory location from said bus master.   
     
     
       4. The method of claim 3 wherein only bytes which are both valid and dirty are selected in step "b". 
     
     
       5. The method of claim 4 wherein said first memory is a cache and said second memory is a system memory. 
     
     
       6. The method of claim 5 wherein step "b" includes: checking said cache for said first data element; and   generating a signal, when invalid bytes in said first data element are detected, to activate said system memory.   
     
     
       7. The method of claim 5 wherein said cache includes a valid/invalid flag for each byte of each data element stored therein representing whether the byte is valid or invalid and wherein each byte of said first data element has a corresponding byte in said second data element. 
     
     
       8. The method of claim 7 wherein valid flags for dirty bytes are used to block the transfer of corresponding data bytes from said system memory. 
     
     
       9. The method of claim 8 wherein said bus has the same number of byte wide lines as the number of bytes in said data element, wherein data bytes are blocked by disconnecting corresponding lines from said memory, and wherein each dirty and valid byte from said cache is combined with remaining bytes from said system memory by connecting corresponding lines from said cache. 
     
     
       10. The method of claim 5 wherein a second cache is also connected to said bus. 
     
     
       11. The method of claim 10 wherein step "b" includes: checking each cache for said first data element.   
     
     
       12. The method of claim 11 wherein: step "a" further comprises storing a third n-byte data element having the same address as said first and second data elements in said second cache; and   step "b" further comprises responding to said first read request by selecting bytes from said each of said first and second caches and system memory and transferring the selected bytes at the same time from said caches and memory to said bus.   
     
     
       13. The method of claim 5 further comprising, prior to responding to said first read request: sequentially responding to other read requests by transferring a plurality of data elements from said memory.   
     
     
       14. The method of claim 13, further comprising: activating said memory while checking said cache for a data element responsive to said first read request.   
     
     
       15. The method of claim 14 wherein valid bytes from said cache are combined with remaining bytes from said system memory only for bytes of said cache data element which are dirty and valid.