Inventor
PANTELAKIS DIMITRIS
US23 patents
⚠️ This page may combine multiple inventors who share the name “PANTELAKIS DIMITRIS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SANDISK TECHNOLOGIES INC
11 patentsUS9153331B2Oct 6, 2015
Tracking cell erase counts of non-volatile memory
SANDISK TECHNOLOGIES INC11 citations84
US9177610B2Nov 3, 2015
Smart bridge for memory core
SANDISK TECHNOLOGIES INC7 citations83
US9177611B2Nov 3, 2015
Smart bridge for memory core
SANDISK TECHNOLOGIES INC4 citations83
US9142261B2Sep 22, 2015
Smart bridge for memory core
SANDISK TECHNOLOGIES INC6 citations83
US9406385B2Aug 2, 2016
Apparatus and method of storing data at a multi-bit storage element
SANDISK TECHNOLOGIES INC2 citations63
US9117533B2Aug 25, 2015
Tracking erase operations to regions of non-volatile memory
SANDISK TECHNOLOGIES INC3 citations63
US9110788B2Aug 18, 2015
Apparatus and method of using dummy data while storing data at a multi-bit storage element
SANDISK TECHNOLOGIES INC2 citations63
US9361220B2Jun 7, 2016
Apparatus and method of using dummy data while storing data at a multi-bit storage element
SANDISK TECHNOLOGIES INC0 citations52
US9245631B2Jan 26, 2016
Apparatus and method of storing data at a multi-bit storage element
SANDISK TECHNOLOGIES INC0 citations52
US9129689B2Sep 8, 2015
Tracking erase pulses for non-volatile memory
SANDISK TECHNOLOGIES INC0 citations52
US9177612B2Nov 3, 2015
Smart bridge for memory core
SANDISK TECHNOLOGIES INC0 citations51
D ABREU MANUEL ANTONIO
4 patentsUS8838883B2Sep 16, 2014
System and method of adjusting a programming step size for a block of a memory
D ABREU MANUEL ANTONIO34 citations94
US8737130B2May 27, 2014
System and method of determining a programming step size for a word line of a memory
D ABREU MANUEL ANTONIO10 citations84
US9177609B2Nov 3, 2015
Smart bridge for memory core
D ABREU MANUEL ANTONIO3 citations73
US9218852B2Dec 22, 2015
Smart bridge for memory core
D ABREU MANUEL ANTONIO2 citations62
INTEL CORP
3 patentsUS5553295ASep 3, 1996
Method and apparatus for regulating the output voltage of negative charge pumps
INTEL CORP136 citations97
US5692164ANov 25, 1997
Method and apparatus for generating four phase non-over lapping clock pulses for a charge pump
INTEL CORP19 citations92
US5532915AJul 2, 1996
Method and apparatus for providing an ultra low power regulated negative charge pump
INTEL CORP28 citations90
CIRRUS LOGIC INC
2 patentsCYPRESS SEMICONDUCTOR CORP
2 patentsUS7225283B1May 29, 2007
Asynchronous arbiter with bounded resolution time and predictable output state
CYPRESS SEMICONDUCTOR CORP7 citations71
US7343510B1Mar 11, 2008
Method and device for selecting one of multiple clock signals based on frequency differences of such clock signals
CYPRESS SEMICONDUCTOR CORP4 citations59