Inventor
CHU FANG-TSUN
TW17 patents
⚠️ This page may combine multiple inventors who share the name “CHU FANG-TSUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IND TECH RES INST
7 patentsUS7221012B2May 22, 2007
Pixel array
IND TECH RES INST19 citations92
US7180090B2Feb 20, 2007
Method of forming thin-film transistor devices with electro-static discharge protection
IND TECH RES INST6 citations73
US6989298B2Jan 24, 2006
Method of forming thin-film transistor devices with electro-static discharge protection
IND TECH RES INST3 citations62
US7736483B2Jun 15, 2010
Method for electroplating metal wire
IND TECH RES INST2 citations55
US7579123B2Aug 25, 2009
Method for crystallizing amorphous silicon into polysilicon and mask used therefor
IND TECH RES INST1 citations52
US7772135B2Aug 10, 2010
Method for forming poly-silicon film
IND TECH RES INST1 citations42
US7611807B2Nov 3, 2009
Method for forming poly-silicon film
IND TECH RES INST0 citations40
TAIWAN SEMICONDUCTOR MFG CO LTD
6 patentsUS9406607B2Aug 2, 2016
Device-manufacturing scheme for increasing the density of metal patterns in inter-layer dielectrics
TAIWAN SEMICONDUCTOR MFG CO LTD5 citations82
US10269699B2Apr 23, 2019
Device-manufacturing scheme for increasing the density of metal patterns in inter-layer dielectrics
TAIWAN SEMICONDUCTOR MFG CO LTD2 citations71
US9893010B2Feb 13, 2018
Device-manufacturing scheme for increasing the density of metal patterns in inter-layer dielectrics
TAIWAN SEMICONDUCTOR MFG CO LTD2 citations71
US11075162B2Jul 27, 2021
Device-manufacturing scheme for increasing the density of metal patterns in inter-layer dielectrics
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations60
US10262989B2Apr 16, 2019
ESD protection for 2.5D/3D integrated circuit systems
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10629528B2Apr 21, 2020
Device-manufacturing scheme for increasing the density of metal patterns in inter-layer dielectrics
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations50