Inventor
NGUYEN TU-AN T
US18 patents
Patents
18 patentsUS10037259B2Jul 31, 2018
Adaptive debug tracing for microprocessors
IBM3 citations68
US12050538B2Jul 30, 2024
Castout handling in a distributed cache topology
IBM0 citations62
US11868773B2Jan 9, 2024
Inferring future value for speculative branch resolution in a microprocessor
IBM1 citations62
US11768684B2Sep 26, 2023
Compaction of architected registers in a simultaneous multithreading processor
IBM0 citations62
US11531548B1Dec 20, 2022
Fast perfect issue of dependent instructions in a distributed issue queue system
IBM1 citations62
US10942745B2Mar 9, 2021
Fast multi-width instruction issue in parallel slice processor
IBM0 citations62
US11907125B2Feb 20, 2024
Hot line fairness mechanism favoring software forward progress
IBM0 citations61
US12038841B2Jul 16, 2024
Decentralized hot cache line tracking fairness mechanism
IBM1 citations60
US11853212B2Dec 26, 2023
Preemptive tracking of remote requests for decentralized hot cache line fairness tracking
IBM1 citations60
US11782836B1Oct 10, 2023
Multiprocessor system cache management with non-authority designation
IBM0 citations60
US10776122B2Sep 15, 2020
Prioritization protocols of conditional branch instructions
IBM1 citations59
US11709676B2Jul 25, 2023
Inferring future value for speculative branch resolution
IBM0 citations51
US11269647B2Mar 8, 2022
Finish status reporting for a simultaneous multithreading processor using an instruction completion table
IBM0 citations51
US10489253B2Nov 26, 2019
On-demand GPR ECC error detection and scrubbing for a multi-slice microprocessor
IBM0 citations51
US10120693B2Nov 6, 2018
Fast multi-width instruction issue in parallel slice processor
IBM1 citations51
US9996359B2Jun 12, 2018
Fast multi-width instruction issue in parallel slice processor
IBM0 citations51
US10318294B2Jun 11, 2019
Operation of a multi-slice processor implementing dependency accumulation instruction sequencing
IBM0 citations37
US10127121B2Nov 13, 2018
Operation of a multi-slice processor implementing adaptive failure state capture
IBM0 citations37