Inventor
LEFEBVRE LAURENT
US48 patents
⚠️ This page may combine multiple inventors who share the name “LEFEBVRE LAURENT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ATI TECHNOLOGIES ULC
16 patentsUS7746348B2Jun 29, 2010
Multi-thread graphics processing system
ATI TECHNOLOGIES ULC20 citations96
US7742053B2Jun 22, 2010
Multi-thread graphics processing system
ATI TECHNOLOGIES ULC31 citations96
US10489876B2Nov 26, 2019
Graphics processing architecture employing a unified shader
ATI TECHNOLOGIES ULC4 citations84
US10346945B2Jul 9, 2019
Multi-thread graphics processing system
ATI TECHNOLOGIES ULC3 citations84
US9922395B2Mar 20, 2018
Multi-thread graphics processing system
ATI TECHNOLOGIES ULC4 citations84
US9904970B2Feb 27, 2018
Multi-thread graphics processing system
ATI TECHNOLOGIES ULC4 citations84
US9582846B2Feb 28, 2017
Graphics processing architecture employing a unified shader
ATI TECHNOLOGIES ULC4 citations84
US8749563B2Jun 10, 2014
Multi-thread graphics processing system
ATI TECHNOLOGIES ULC6 citations84
US7656417B2Feb 2, 2010
Appearance determination using fragment reduction
ATI TECHNOLOGIES ULC8 citations84
US11710209B2Jul 25, 2023
Multi-thread graphics processing system
ATI TECHNOLOGIES ULC0 citations62
US11605149B2Mar 14, 2023
Graphics processing architecture employing a unified shader
ATI TECHNOLOGIES ULC0 citations62
US11361399B2Jun 14, 2022
Multi-thread graphics processing system
ATI TECHNOLOGIES ULC0 citations62
US11328382B2May 10, 2022
Graphics processing architecture employing a unified shader
ATI TECHNOLOGIES ULC0 citations62
US11023996B2Jun 1, 2021
Graphics processing architecture employing a unified shader
ATI TECHNOLOGIES ULC0 citations62
US10957007B2Mar 23, 2021
Multi-thread graphics processing system
ATI TECHNOLOGIES ULC0 citations62
US10796400B2Oct 6, 2020
Graphics processing architecture employing a unified shader
ATI TECHNOLOGIES ULC0 citations52
ADVANCED MICRO DEVICES INC
15 patentsUS10546365B2Jan 28, 2020
Single pass flexible screen/scale rasterization
ADVANCED MICRO DEVICES INC2 citations72
US11308648B2Apr 19, 2022
Compressing texture data on a per-channel basis
ADVANCED MICRO DEVICES INC2 citations71
US10169906B2Jan 1, 2019
Hybrid render with deferred primitive batch binning
ADVANCED MICRO DEVICES INC2 citations70
US11954782B2Apr 9, 2024
Hybrid render with preferred primitive batch binning and sorting
ADVANCED MICRO DEVICES INC0 citations61
US10957094B2Mar 23, 2021
Hybrid render with preferred primitive batch binning and sorting
ADVANCED MICRO DEVICES INC1 citations61
US12499582B2Dec 16, 2025
Compressing texture data on a per-channel basis
ADVANCED MICRO DEVICES INC0 citations60
US12406426B2Sep 2, 2025
Hybrid render with deferred primitive batch binning
ADVANCED MICRO DEVICES INC0 citations60
US11880926B2Jan 23, 2024
Hybrid render with deferred primitive batch binning
ADVANCED MICRO DEVICES INC0 citations60
US11694367B2Jul 4, 2023
Compressing texture data on a per-channel basis
ADVANCED MICRO DEVICES INC0 citations60
US11335052B2May 17, 2022
Hybrid render with deferred primitive batch binning
ADVANCED MICRO DEVICES INC0 citations60
US11562459B2Jan 24, 2023
Selectively writing back dirty cache lines concurrently with processing
ADVANCED MICRO DEVICES INC0 citations57
US11551398B2Jan 10, 2023
Light volume rendering
ADVANCED MICRO DEVICES INC0 citations53
US11379941B2Jul 5, 2022
Primitive shader
ADVANCED MICRO DEVICES INC0 citations51
US10943389B2Mar 9, 2021
Removing or identifying overlapping fragments after z-culling
ADVANCED MICRO DEVICES INC0 citations49
US11631187B2Apr 18, 2023
Depth buffer pre-pass
ADVANCED MICRO DEVICES INC0 citations48
LEFEBVRE LAURENT
7 patentsUS8400459B2Mar 19, 2013
Multi-thread graphics processing system
LEFEBVRE LAURENT7 citations92
US8072461B2Dec 6, 2011
Multi-thread graphics processing system
LEFEBVRE LAURENT8 citations92
US8305382B2Nov 6, 2012
Multi-thread graphics processing system
LEFEBVRE LAURENT6 citations83
US8468547B2Jun 18, 2013
Method and system for synchronizing thread wavefront data and events
LEFEBVRE LAURENT10 citations79
US8190826B2May 29, 2012
Write combining cache with pipelined synchronization
LEFEBVRE LAURENT2 citations56
US9304772B2Apr 5, 2016
Ordering thread wavefronts instruction operations based on wavefront priority, operation counter, and ordering scheme
LEFEBVRE LAURENT0 citations52
US8972693B2Mar 3, 2015
Hardware managed allocation and deallocation evaluation circuit
LEFEBVRE LAURENT0 citations52
ATI TECHNOLOGIES INC
6 patentsUS7239322B2Jul 3, 2007
Multi-thread graphic processing system
ATI TECHNOLOGIES INC38 citations96
US6897871B1May 24, 2005
Graphics processing architecture employing a unified shader
ATI TECHNOLOGIES INC123 citations96
US7327369B2Feb 5, 2008
Graphics processing architecture employing a unified shader
ATI TECHNOLOGIES INC37 citations94
US6768491B2Jul 27, 2004
Barycentric centroid sampling method and apparatus
ATI TECHNOLOGIES INC22 citations92
US7336275B2Feb 26, 2008
Pseudo random number generator and method
ATI TECHNOLOGIES INC2 citations63
US7636095B2Dec 22, 2009
Pixel delta interpolation method and apparatus
ATI TECHNOLOGIES INC0 citations50