Inventor

ZHU JINGHUI

US48 patents

⚠️ This page may combine multiple inventors who share the name “ZHU JINGHUI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ZHU JINGHUI

GOWIN SEMICONDUCTOR CORP

Methods and apparatus for providing a clock fabric for an FPGA organized in multiple clock regions

Method and system for providing word addressable nonvolatile memory in a programmable logic device

Method and system for providing word addressable nonvolatile memory in a programmable logic device

Method and system for enhancing programmability of a field-programmable gate array

Method and system for organizing programmable semiconductor device into multiple clock regions

Methods and apparatus for organizing a programmable semiconductor device into multiple clock regions

System level integrated circuit chip

Method and system for providing programmable microcontroller unit (MCU) using two-phase configuration process

Method and system for accessing a nonvolatile memory via SPI ports

Method and apparatus for providing multiple power domains in a programmable semiconductor device

Method and system for providing word addressable nonvolatile memory in a programmable logic device

Methods and apparatus for providing a low-power memory block using a pair of nvm cells

Method and system for providing programmable microcontroller unit (MCU) using two-phase configuration process

Method and system for providing FPGA device identification via a set of embedded signature registers

Method and system for accessing a nonvolatile memory via SPI ports

Method and apparatus for providing multiple power domains to a programmable semiconductor device

Method and system for providing programmable microcontroller unit (MCU) using two-phase configuration process

Method and apparatus for providing multiple power domains a programmable semiconductor device

Method and system providing FPGA device identification via a set of embedded signature registers

Method and system for enhancing programmability of a field programmable gate array

Method and system for enhancing programmability of a field-programmable gate array via a dual-mode port

Method and system for providing wireless FPGA programming download via a wireless communication block

Method and system for providing wireless FPGA programming download via a wireless communication block

Method and system for providing regional electrical grid for power conservation in a programmable device

Data processing method and device for nonvolatile memory and storage medium

LATTICE SEMICONDUCTOR CORP

High speed interface for a programmable interconnect circuit

I/O block for a programmable interconnect circuit

Differential input receiver with programmable failsafe

High speed interface for a programmable interconnect circuit

Programmable interconnect circuit with a phase-locked loop

SERDES with programmable I/O architecture

FIFO memory architecture

Block-oriented architecture for a programmable interconnect circuit

Multi-level routing structure for a programmable interconnect circuit

Verify scheme for a multi-level routing structure

SERDES with programmable I/O architecture

GOWIN SEMICONDUCTOR CORP LTD

Method and system for providing a sleep mode to a configurable logic block using an intermittent power saving logic

Programmability of a field-programmable gate array via a dual-mode port

Method and apparatus for providing field-programmable gate array (FPGA) integrated circuit (IC) package

Method and apparatus for providing field-programmable gate array (FPGA) integrated circuit (IC) package

Secrecy system and decryption method of on-chip data stream of nonvolatile FPGA

Programmable logic device with on-chip user non-volatile memory

ZHU JINGHUI

Method and system for providing regional electrical grid for power conservation in a programmable device

Method and system for providing a sleep mode to a configurable logic block using an intermittent power saving logic

Methods and system for providing software defined microcontroller unit (MCU)

Method and system for providing regional electrical grid for power conservation in a programmable device

JENNINGS GRANT THOMAS

Method and system for providing a programmable logic device having a configurable wireless communication block field

GUANGDONG GOWIN SEMICONDUCTOR CORP LTD

General purpose interface circuit compatible with output of MIPI signals