Inventor
MULJONO HARRY
US53 patents
⚠️ This page may combine multiple inventors who share the name “MULJONO HARRY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
44 patentsUS6707118B2Mar 16, 2004
Semiconductor-on-insulator resistor-capacitor circuit
INTEL CORP131 citations99
US6288563B1Sep 11, 2001
Slew rate control
INTEL CORP168 citations99
US6538464B2Mar 25, 2003
Slew rate control
INTEL CORP51 citations96
US6636069B1Oct 21, 2003
Method and apparatus for compensated slew rate control of line termination
INTEL CORP45 citations93
US6247136B1Jun 12, 2001
Method and apparatus for capturing data from a non-source synchronous component in a source synchronous environment
INTEL CORP30 citations92
US5774001AJun 30, 1998
Method for eliminating multiple output switching timing skews in a source synchronous design
INTEL CORP23 citations92
US5723995AMar 3, 1998
Method for eliminating process variation timing skews in a source synchronous design
INTEL CORP22 citations92
US5706484AJan 6, 1998
Method for eliminating transition direction sensitive timing skews in a source synchronous design
INTEL CORP48 citations92
US6311285B1Oct 30, 2001
Method and apparatus for source synchronous transfers at frequencies including an odd fraction of a core frequency
INTEL CORP26 citations91
US6650159B2Nov 18, 2003
Method and apparatus for precise signal interpolation
INTEL CORP28 citations90
US6366129B1Apr 2, 2002
Method and apparatus for buffering an input-output node of an integrated circuit
INTEL CORP28 citations90
US7036055B2Apr 25, 2006
Arrangements for self-measurement of I/O specifications
INTEL CORP50 citations87
US7069455B2Jun 27, 2006
Low power differential link interface methods and apparatuses
INTEL CORP12 citations84
US6898741B2May 24, 2005
Arrangements for self-measurement of I/O timing
INTEL CORP18 citations84
US6803820B1Oct 12, 2004
Apparatus and method for reducing common-mode current in differential link
INTEL CORP15 citations84
US6092212AJul 18, 2000
Method and apparatus for driving a strobe signal
INTEL CORP16 citations84
US6596980B2Jul 22, 2003
Method and apparatus to measure statistical variation of electrical signal phase in integrated circuits using time-correlated photon counting
INTEL CORP13 citations82
US6738844B2May 18, 2004
Implementing termination with a default signal on a bus line
INTEL CORP13 citations81
US6519664B1Feb 11, 2003
Parallel terminated bus system
INTEL CORP6 citations74
US6430697B1Aug 6, 2002
Method and apparatus for reducing data return latency of a source synchronous data bus by detecting a late strobe and enabling a bypass path
INTEL CORP10 citations74
US6347350B1Feb 12, 2002
Driving the last inbound signal on a line in a bus with a termination
INTEL CORP6 citations74
US6044417AMar 28, 2000
System for controlling operational characteristics of buffer group where capture registers receive control signals in parallel and update registers transfer control signals to buffer group
INTEL CORP11 citations74
US7541838B2Jun 2, 2009
Transmitter swing control circuit and method
INTEL CORP7 citations72
US9910484B2Mar 6, 2018
Voltage regulator training
INTEL CORP2 citations70
US9602160B2Mar 21, 2017
Apparatus and method for digitally cancelling crosstalk
INTEL CORP2 citations69
US11444445B2Sep 13, 2022
Driver assisted ESD protection apparatus and method
INTEL CORP3 citations68
US10496581B2Dec 3, 2019
Un-sampled decision feedback equalizer including configurable loop delay
INTEL CORP4 citations68
US9306555B2Apr 5, 2016
Apparatus and method to achieve CPAD mitigation effects
INTEL CORP2 citations63
US7363551B2Apr 22, 2008
Systems and methods for measuring signal propagation delay between circuits
INTEL CORP6 citations63
US6995552B2Feb 7, 2006
Voltage modulator circuit to control light emission for non-invasive timing measurements
INTEL CORP2 citations63
US6629171B2Sep 30, 2003
Driving the last inbound signal on a line in a bus with a termination
INTEL CORP3 citations63
US6507182B2Jan 14, 2003
Voltage modulator circuit to control light emission for non-invasive timing measurements
INTEL CORP2 citations63
US6438636B2Aug 20, 2002
Updating termination for a bus
INTEL CORP2 citations63
US7890287B2Feb 15, 2011
Link transmitter swing compensation
INTEL CORP2 citations61
US10884969B2Jan 5, 2021
Elastic eye widening circuit
INTEL CORP1 citations59
US7609091B2Oct 27, 2009
Link transmitter with reduced power consumption
INTEL CORP2 citations59
US7218148B2May 15, 2007
Tracking unity gain for edge rate and timing control
INTEL CORP2 citations58
US7940840B2May 10, 2011
Dual barrel receiver equalization architecture
INTEL CORP3 citations55
US7180345B2Feb 20, 2007
Apparatus and a method to provide time-based edge-rate compensation
INTEL CORP3 citations55
US7669069B2Feb 23, 2010
Control of link supply power based on link port mode
INTEL CORP0 citations52
US6524897B1Feb 25, 2003
Semiconductor-on-insulator resistor-capacitor circuit
INTEL CORP0 citations52
US10528515B2Jan 7, 2020
Memory channel driver with echo cancellation
INTEL CORP0 citations50
US10324124B2Jun 18, 2019
Apparatus and method for testing pad capacitance
INTEL CORP0 citations49
US10944256B2Mar 9, 2021
On-die circuitry for electrostatic discharge protection (ESD) analysis
INTEL CORP0 citations45
TIAN KATHY
2 patentsERICSSON TELEFON AB L M
1 patentSUN LINDA K
1 patentYIN LIANG
1 patentMULJONO HARRY
1 patentShowing the top 50 of 53 patents by PatentIndex Score.