P
US7363551B2ExpiredUtilityPatentIndex 63

Systems and methods for measuring signal propagation delay between circuits

Assignee: INTEL CORPPriority: Dec 30, 2005Filed: Dec 30, 2005Granted: Apr 22, 2008
Est. expiryDec 30, 2025(expired)· nominal 20-yr term from priority
Inventors:MULJONO HARRY
G01R 31/31716G01R 31/3016
63
PatentIndex Score
6
Cited by
3
References
12
Claims

Abstract

Embodiments include systems and methods for measurement of signal propagation delay between Input/Output (IO) Loopback (IOLB) circuits. Embodiments include measurement of an output delay time of a first IOLB circuit and measurement of an input delay time of a second IOLB circuit. Embodiments also include measurement of a total delay time from an internal point of the first IOLB circuit to an internal point of the second IOLB circuit. Embodiments subtract from the measured total delay time, the measured output delay time of the first IOLB circuit and the measured input delay time of the second IOLB circuit to determine the time of flight of a signal between the I/O pads of the two IOLB circuits.

Claims

exact text as granted — not AI-modified
1. A test system for measuring times of flight between Input/Output (IO) Loopback (IOLB) circuits, comprising
 a plurality of IOLB circuits, each with a mechanism within the IOLB circuit to determine an input delay time and an output delay time of the IOLB circuit; and 
 a controller to select two of the plurality of IOLB circuits and to determine a time of flight there between by measuring a total delay time and subtracting both an output delay time of a first of the two IOLB circuits and an input delay time of the second IOLB circuit. 
 
   
   
     2. The system of  claim 1 , further comprising a multiplexer controller to set up for each of one or more IOLB circuits, a first internal test path comprising both an internal output path and an internal input path, and a second internal test path comprising the internal input path. 
   
   
     3. The system of  claim 2 , wherein an IOLB circuit comprises a multiplexer to receive at one input a signal from the I/O pad of the IOLB circuit and to receive at another input a test signal. 
   
   
     4. The system of  claim 3 , wherein an IOLB circuit further comprises a second multiplexer to select between a test signal and data from a data source. 
   
   
     5. The system of  claim 2 , further comprising a calculator to subtract a measured signal propagation time along the second internal test path from a measured signal propagation time along the first internal test path. 
   
   
     6. The System of  claim 1 , further comprising a multiplexer within an IOLB circuit to receive at one input a signal from the I/O pad of the IOLB circuit and to receive at another input a test signal. 
   
   
     7. The system of  claim 6 , wherein an IOLB circuit further comprises a second multiplexer to select between a test signal and data from a data source. 
   
   
     8. The system of  claim 1 , wherein an IOLB circuit comprises an output path from a first internal point of the IOLB circuit to an I/O pad of the IOLB circuit. 
   
   
     9. The system of  claim 1 , further comprising a pattern generator within an IOLB circuit to generate a first test signal to be propagated through an output path to an I/O pad of the IOLB circuit. 
   
   
     10. The system of  claim 9 , further comprising a comparator within the IOLB circuit to receive at a first of its inputs one of the first and second test signals and to receive at a second of its inputs a reference signal from the pattern generator, wherein the comparator within the IOLB circuit determines a first propagation time of the first test signal along the output path and the input path, and determines a second propagation time of the second test signal along the input path. 
   
   
     11. The system of  claim 1 , further comprising a multiplexer within an IOLB circuit in an input path to select as an output one of a plurality of inputs, one input receiving a signal from an I/O pad of the IOLB circuit, and another input receiving a second test signal. 
   
   
     12. The system of  claim 1 , further comprising an input path from an input of the multiplexer to a second internal point of the IOLB circuit.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.