Inventor

LIU TZUAN-HORNG

TW110 patents

⚠️ This page may combine multiple inventors who share the name “LIU TZUAN-HORNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIU TZUAN-HORNG

TAIWAN SEMICONDUCTOR MFG CO LTD

Method of manufacturing semiconductor device packaging structure having through interposer vias and through substrate vias

3DIC structure and method of manufacturing the same

Method for manufacturing a semiconductor device having an interconnect structure over a substrate

Integrated circuit package and method

Package structure and method of manufacturing the same

Integrated circuit package and method

Integrated circuit package and method

Package and method of fabricating the same

Semiconductor device and method of manufacture

Semiconductor structure and manufacturing method thereof

Semiconductor packages and method of forming the same

Semiconductor device packaging structure having through interposer vias and through substrate vias

Semiconductor structure and manufacturing method thereof

Integrated circuit component and package structure having the same

Interposer test structures and methods

Passivation layer for packaged chip

Semiconductor device and method of manufacture

Semiconductor package and method of manufacturing the same

Method for fabricating a chip package

Integrated circuit package and method

Semiconductor packages

Manufacturing method of semiconductor structure

Stacking structure, package structure and method of fabricating the same

Package having multiple chips integrated therein and manufacturing method thereof

Integrated circuit package and method

Three-dimensional stacking structure and manufacturing method thereof

Die stack structure and manufacturing method thereof

Package structure and method of fabricating the same

Semiconductor structure and method of fabricating the same

Stacking structure, package structure and method of fabricating the same

Mask assembly and method for fabricating a chip package

Package and manufacturing method of reconstructed wafer

Package structure, chip structure and method of fabricating the same

Semiconductor structure and manufacturing method thereof

Semiconductor structures and methods of forming the same

Interposer test structures and methods

Semiconductor structure and method manufacturing the same

Method for fabricating device die

Semiconductor package and manufacturing method thereof

TAIWAN SEMICONDUCTOR MFG

Methods and apparatus for inductors and transformers in packages

Semiconductor device having conductive pads and a method of manufacturing the same

Methods and apparatus of packaging with interposers

Reducing delamination between an underfill and a buffer layer in a bond structure

LIU TZUAN-HORNG

Interposer test structures and methods

Dummy metal design for packaging structures

JENG SHIN-PUU

Passivation layer for packaged chip

WU WEI-CHENG

Semiconductor device having pad structure with stress buffer layer

KUO CHEN-CHENG

Semiconductor device having conductive pads and a method of manufacturing the same

CHEN HSIEN-WEI

Increasing dielectric strength by optimizing dummy metal distribution

YANG CHUNG-YING

Package-on-package structures with reduced bump bridging