Inventor

TAMADA SATORU

JP19 patents

⚠️ This page may combine multiple inventors who share the name “TAMADA SATORU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TAMADA SATORU

MICRON TECHNOLOGY INC

Multi level inhibit scheme

Memory array with inverted data-line pairs

System and devices including memory resistant to program disturb and methods of using, making, and operating the same

Systems and devices including memory resistant to program disturb and methods of using, making, and operating the same

Enable/disable of memory chunks during memory access

Enable/disable of memory chunks during memory access

MITSUBISHI ELECTRIC CORP

Nonvolatile semiconductor memory device having structure storing multivalued data and data storage system comprising the nonvolatile semiconductor memory device

Nonvolatile semiconductor memory device having an array structure suitable to high-density integrationization

Non-volatile semiconductor memory device configured to read data at a high speed

Non-volatile semiconductor memory device capable of suppressing writing and erasure failure rate

Semiconductor memory

RENESAS TECH CORP

Non-volatile semiconductor memory device

Nonvolatile semiconductor memory device having reduced dependency of a source resistance on a position in an array

TAMADA SATORU

Multi level inhibit scheme

Memory array with inverted data-lines pairs

INTEL CORP

Divided bitline flash memory array with local sense and signal transmission

Boosting seed voltage for a memory device

MANABE TETSUJI

Small unit internal verify read in a memory device

Small unit internal verify read in a memory device