Inventor

ISHIBASHI KOICHIRO

JP194 patents

⚠️ This page may combine multiple inventors who share the name “ISHIBASHI KOICHIRO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ISHIBASHI KOICHIRO

HITACHI LTD

Semiconductor memory device with memory cells operated by boosted voltage

SRAM cells with two P-well structure

Semiconductor device with low power consumption memory circuit

Semiconductor integrated circuit device including a speed monitor circuit and a substrate bias controller responsive to the speed-monitor circuit

Semiconductor integrated circuit device

High speed semiconductor memory apparatus including circuitry to increase writing and reading speed

SRAM having load transistor formed above driver transistor

Static memory cell having independent data holding voltage

Semiconductor integrated circuit

Semiconductor device

Low-power semiconductor memory device

Semiconductor integrated circuit having oscillators or oscillation circuits connected to a wiring line at connection points with intervals in length therebetween

Semiconductor integrated circuit device, method of manufacturing the device, and computer readable medium

Semiconductor integrated circuit

Static memory cell having independent data holding voltage

Semiconductor integrated circuit apparatus

Timing-control circuit device and clock distribution system

Semiconductor integrated circuit device

Semiconductor memory device

Static memory cell having independent data holding voltage

Cache memory employing dynamically controlled data array start timing and a microcomputer using the same

Process for fabricating a semiconductor integrated circuit device

Semiconductor memory device having flip-flop circuits

Sense amplifier for a memory device

High speed MOSFET output buffer with low noise

Static random-access memory having multilevel conductive layer

Semiconductor memory device

Translation lookaside buffer supporting multiple page sizes

RENESAS TECH CORP

Semiconductor memory device

Semiconductor integrated circuit device including a substrate bias controller and a current limiting circuit

Semiconductor integrated circuit device, method of manufacturing the device, and computer readable medium

Semiconductor integrated circuit device in which operating frequency, supply voltage and substrate bias voltage are controllable to reduce power consumption

Well bias control circuit

Processor for controlling substrate biases in accordance to the operation modes of the processor

Semiconductor device

Semiconductor integrated circuit device

Semiconductor integrated circuit including charging pump

Semiconductor memory device with memory cells operated by boosted voltage

Semiconductor device

SRAM memory semiconductor integrated circuit device

Semiconductor memory device with memory cells operated by boosted voltage

Semiconductor integrated circuit device

RENESAS ELECTRONICS CORP

Semiconductor memory device that can stably perform writing and reading without increasing current consumption even with a low power supply voltage

Semiconductor memory device that can stably perform writing and reading without increasing current consumption even with a low power supply voltage

Semiconductor device

MATSUSHITA ELECTRIC INDUSTRIAL CO LTD

Power management for circuits with inactive state data save and restore scan chain

NII KOJI

Semiconductor memory device that can stably perform writing and reading without increasing current consumption even with a low power supply voltage

Renesas Electronics Corportion

Semiconductor memory device that can stably perform writing and reading without increasing current consumption even with a low power supply voltage

HITACHI ULSI SYS CO LTD

Semiconductor integrated circuit device with reduced leakage current

IKEDA SHUJI

SRAM with dual word lines overlapping drive transistor gates