Inventor · disambiguated record
Chia-Shun Hsiao
Also filed as: HSIAO CHIA-SHUN
21 granted patents·12 pending applications·329 citations·filing 1996–2008
95Inventor score
Top patents by PatentIndex Score
33 records- 0188US6566196B1Sidewall protection in fabrication of integrated circuitsMOSEL VITELIC INC·Filed 2002·Granted May 20, 2003·51 cites·9 claims
- 0288US6391705B1Fabrication method of high-density semiconductor memory cell structure having a trenchPROMOS TECHNOLOGIES INC·Filed 2000·Granted May 21, 2002·44 cites·9 claims
- 0387US6562681B2Nonvolatile memories with floating gate spacers, and methods of fabricationMOSEL VITELIC INC·Filed 2001·Granted May 13, 2003·38 cites·32 claims
- 0483US7323729B2Methods for improving quality of high temperature oxide (HTO) formed from halogen-containing precursor and products thereof and apparatus thereforPROMOS TECHNOLOGIES INC·Filed 2006·Granted Jan 29, 2008·7 cites·12 claims
- 0580US6355518B1Method for making a DRAM cell with deep-trench capacitors and overlying vertical transistorsPROMOS TECHNOLOGIES INC·Filed 2000·Granted Mar 12, 2002·25 cites·20 claims
- 0679US7910429B2Method of forming ONO-type sidewall with reduced bird's beakPROMOS TECHNOLOGIES INC·Filed 2004·Granted Mar 22, 2011·28 cites·21 claims
- 0778US6291286B1Two-step strap implantation of making deep trench capacitors for DRAM cellsPROMOS TECHNOLOGY INC·Filed 1998·Granted Sep 18, 2001·37 cites·10 claims
- 0875US6570215B2Nonvolatile memories with floating gate spacers, and methods of fabricationMOSEL VITELIC INC·Filed 2002·Granted May 27, 2003·17 cites·18 claims
- 0971US6815760B2Nonvolatile memory structures and fabrication methodsMOSEL VITELIC INC·Filed 2002·Granted Nov 9, 2004·10 cites·12 claims
- 1068US7196381B2Corner protection to reduce wrap aroundPROMOS TECHNOLOGIES PTE LTD·Filed 2005·Granted Mar 27, 2007·2 cites·19 claims
- 1168US5946568ASelf aligned method of fabricating a DRAM with improved capacitanceMOSEL VITELIC INC·Filed 1996·Granted Aug 31, 1999·38 cites·8 claims
- 1265US7071127B2Methods for improving quality of semiconductor oxide composition formed from halogen-containing precursorPROMOS TECHNOLOGIES INC·Filed 2003·Granted Jul 4, 2006·8 cites·11 claims
- 1364US6821847B2Nonvolatile memory structures and fabrication methodsMOSEL VITELIC INC·Filed 2001·Granted Nov 23, 2004·7 cites·35 claims
- 1459US6864148B1Corner protection to reduce wrap aroundMOSEL VITELIC INC·Filed 2003·Granted Mar 8, 2005·5 cites·25 claims
- 1554US7297597B2Method for simultaneously fabricating ONO-type memory cell, and gate dielectrics for associated high voltage write transistors and gate dielectrics for low voltage logic transistors by using ISSGPROMOS TECHNOLOGIES INC·Filed 2004·Granted Nov 20, 2007·6 cites·19 claims
- 1654US6962848B2Nonvolatile memory structures and fabrication methodsPROMOS TECHNOLOGIES INC·Filed 2003·Granted Nov 8, 2005·4 cites·10 claims
- 1751US2007264779A1Methods for forming floating gate memory structuresPROMOS TECHNOLOGIES INC·Filed 2007·Application pending·0 cites
- 1851US2007187748A1Floating gate memory structuresHSIAO CHIA-SHUN·Filed 2007·Application pending·0 cites
- 1948US2005196913A1Floating gate memory structures and fabrication methodsPROMOS TECHNOLOGIES INC·Filed 2005·Application pending·0 cites
- 2048US2008268646A1Reduced area dynamic random access memory (dram) cell and method for fabricating the samePROMOS TECHNOLOGIES PET LTD·Filed 2008·Application pending·0 cites
- 2147US2006211255A1Use of multiple etching steps to reduce lateral etch undercutHUANG CHUNCHIEH·Filed 2006·Application pending·0 cites
- 2244US7375027B2Method of providing contact via to a surfacePROMOS TECHNOLOGIES INC·Filed 2004·Granted May 20, 2008·2 cites·10 claims
- 2343US2007085152A1Reduced area dynamic random access memory (DRAM) cell and method for fabricating the samePROMOS TECHNOLOGIES PTE LTD SI·Filed 2005·Application pending·0 cites
- 2442US7582524B2Method for preparing a memory structurePROMOS TECHNOLOGIES INC·Filed 2006·Granted Sep 1, 2009·0 cites·16 claims
- 2540US2008044970A1Memory structure and method for preparing the samePROMOS TECHNOLOGIES INC·Filed 2006·Application pending·0 cites
- 2639US2007072387A1Method of fabricating shallow trench isolation structureLAI SU-CHEN·Filed 2005·Application pending·0 cites
- 2739US2005037530A1Floating gate memory structures and fabrication methodsFiled 2003·Application pending·0 cites
- 2838US7071115B2Use of multiple etching steps to reduce lateral etch undercutPROMOS TECHNOLOGIES INC·Filed 2004·Granted Jul 4, 2006·0 cites·12 claims
- 2938US2004065937A1Floating gate memory structures and fabrication methodsFiled 2002·Application pending·0 cites
- 3037US2007090409A1Semiconductor device comprising an undoped oxide barrierPROMOS TECHNOLOGIES INC·Filed 2005·Application pending·0 cites
- 3137US2007093014A1Method for preventing doped boron in a dielectric layer from diffusing into a substratePROMOS TECHNOLOGIES INC·Filed 2005·Application pending·0 cites
- 3234US7300745B2Use of pedestals to fabricate contact openingsPROMOS TECHNOLOGIES INC·Filed 2004·Granted Nov 27, 2007·0 cites·52 claims
- 3327US6399437B1Enhanced side-wall stacked capacitorMOSEL VITELIC INC·Filed 1998·Granted Jun 4, 2002·0 cites·14 claims
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