Inventor · disambiguated record
Erin C. Jones
Also filed as: JONES ERIN C · JONES ERIN CATHERINE
28 granted patents·3 pending applications·1,221 citations·filing 1998–2008
97Inventor score
Files withIBM29
Top patents by PatentIndex Score
31 records- 0198US6472258B1Double gate trench transistorIBM·Filed 2000·Granted Oct 29, 2002·162 cites·9 claims
- 0298US6057212AMethod for making bonded metal back-plane substratesIBM·Filed 1998·Granted May 2, 2000·388 cites·26 claims
- 0396US6797553B2Method for making multiple threshold voltage FET using multiple work-function gate materialsIBM·Filed 2002·Granted Sep 28, 2004·119 cites·17 claims
- 0496US6406962B1Vertical trench-formed dual-gate FET device structure and method for creationIBM·Filed 2001·Granted Jun 18, 2002·139 cites·40 claims
- 0594US6580132B1Damascene double-gate FETIBM·Filed 2002·Granted Jun 17, 2003·76 cites·10 claims
- 0692US7453123B2Self-aligned planar double-gate transistor structureIBM·Filed 2007·Granted Nov 18, 2008·15 cites·1 claims
- 0790US6339002B1Method utilizing CMP to fabricate double gate MOSFETS with conductive sidewall contactsIBM·Filed 2000·Granted Jan 15, 2002·51 cites·22 claims
- 0887US6448590B1Multiple threshold voltage FET using multiple work-function gate materialsIBM·Filed 2000·Granted Sep 10, 2002·38 cites·11 claims
- 0986US7205185B2Self-aligned planar double-gate process by self-aligned oxidationIBM·Filed 2003·Granted Apr 17, 2007·26 cites·18 claims
- 1086US6686630B2Damascene double-gate MOSFET structure and its fabrication methodIBM·Filed 2001·Granted Feb 3, 2004·44 cites·4 claims
- 1184US6333247B1Two-step MOSFET gate formation for high-density devicesIBM·Filed 2000·Granted Dec 25, 2001·33 cites·19 claims
- 1283US6835633B2SOI wafers with 30-100 Å buried oxide (BOX) created by wafer bonding using 30-100 Å thin oxide as bonding layerIBM·Filed 2002·Granted Dec 28, 2004·24 cites·7 claims
- 1380US7265417B2Method of fabricating semiconductor side wall finIBM·Filed 2004·Granted Sep 4, 2007·20 cites·12 claims
- 1479US6833569B2Self-aligned planar double-gate process by amorphizationIBM·Filed 2002·Granted Dec 21, 2004·24 cites·17 claims
- 1579US6762101B2Damascene double-gate FETIBM·Filed 2003·Granted Jul 13, 2004·22 cites·13 claims
- 1677US7361556B2Method of fabricating semiconductor side wall finIBM·Filed 2006·Granted Apr 22, 2008·5 cites·10 claims
- 1770US7387924B2Polycrystalline SiGe junctions for advanced devicesIBM·Filed 2006·Granted Jun 17, 2008·2 cites·1 claims
- 1865US7713837B2Low temperature fusion bonding with high surface energy using a wet chemical treatmentIBM·Filed 2008·Granted May 11, 2010·2 cites·14 claims
- 1961US7163864B1Method of fabricating semiconductor side wall finIBM·Filed 2000·Granted Jan 16, 2007·7 cites·8 claims
- 2058US7741165B2Polycrystalline SiGe Junctions for advanced devicesIBM·Filed 2008·Granted Jun 22, 2010·0 cites·12 claims
- 2158US7566631B2Low temperature fusion bonding with high surface energy using a wet chemical treatmentIBM·Filed 2006·Granted Jul 28, 2009·1 cites·1 claims
- 2254US7960790B2Self-aligned planar double-gate transistor structureIBM·Filed 2008·Granted Jun 14, 2011·0 cites·18 claims
- 2352US6238737B1Method for protecting refractory metal thin film requiring high temperature processing in an oxidizing atmosphere and structure formed therebyIBM·Filed 1999·Granted May 29, 2001·14 cites·20 claims
- 2451US7166521B2SOI wafers with 30-100 Å buried oxide (BOX) created by wafer bonding using 30-100 Å thin oxide as bonding layerIBM·Filed 2004·Granted Jan 23, 2007·2 cites·17 claims
- 2548US6579614B2Structure having refractory metal film on a substrateIBM·Filed 2001·Granted Jun 17, 2003·1 cites·15 claims
- 2640US7135391B2Polycrystalline SiGe junctions for advanced devicesIBM·Filed 2004·Granted Nov 14, 2006·0 cites·14 claims
- 2739US7112845B2Double gate trench transistorIBM·Filed 2002·Granted Sep 26, 2006·0 cites·13 claims
- 2839US6281551B1Back-plane for semiconductor deviceIBM·Filed 1999·Granted Aug 28, 2001·6 cites·15 claims
- 2939US2004126993A1Low temperature fusion bonding with high surface energy using a wet chemical treatmentFiled 2002·Application pending·0 cites
- 3036US2002197836A1Method of forming variable oxide thicknesses across semiconductor chipsIBM·Filed 2001·Application pending·0 cites
- 3134US2002042183A1Two-step MOSFET gate formation for high-density devicesFiled 2001·Application pending·0 cites
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