Inventor

GUNNAM KIRAN

US57 patents

⚠️ This page may combine multiple inventors who share the name “GUNNAM KIRAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GUNNAM KIRAN

GUNNAM KIRAN

Low latency programmable encoder with outer systematic code and low-density parity-check code

Error-floor mitigation of LDPC codes using targeted bit adjustments

Reconfigurable adder

RAM list-decoding of near codewords

Error-floor mitigation of error-correction codes by changing the decoder alphabet

Error-correction decoder employing multiple check-node algorithms

Generic encoder for low-density parity-check (LDPC) codes

Adjusting soft-output values in turbo equalization schemes to break trapping sets

Adjusting input samples in turbo equalization schemes to break trapping sets

Error-correction decoder employing check-node message averaging

Error-correction decoder employing extrinsic message averaging

Generic encoder for low-density parity-check (LDPC) codes

ROM list-decoding of near codewords

Breaking trapping sets using targeted bit adjustment

Systems and methods for variable data processing using a central queue

Low latency programmable encoder with outer systematic code and low-density parity-check code

Selecting layered-decoding schedules for offline testing

Reconfigurable cyclic shifter

Breaking unknown trapping sets using a database of known trapping sets

Reconfigurable minimum operator

Reconfigurable two&#39;s-complement and sign-magnitude converter

Multi-stage interconnection networks having fixed mappings

Multi-mode layered decoding

Local and global interleaving/de-interleaving on values in an information word

Error-floor mitigation of layered decoders using non-standard layered-decoding schedules

Error-floor mitigation of layered decoders using LMAXB-based selection of alternative layered-decoding schedules

On-line discovery and filtering of trapping sets

Communications system employing local and global interleaving/de-interleaving

MARVELL INT LTD

Interleaver for turbo equalization

Generic encoder for low-density parity-check (LDPC) codes

Interleaver for turbo equalization

Optimizing error floor performance of finite-precision layered decoders of low-density parity-check (LDPC) codes

Generic encoder for low-density parity-check (LDPC) codes

LSI CORP

Matrix vector multiplication for error-correction encoding and the like

Systems and methods for utilizing a centralized queue based data processing circuit

Forward substitution for error-correction encoding and the like

Systems and methods for decoder sharing between data sets

WESTERN DIGITAL TECH INC

Flexible accelerator for sparse tensors in convolutional neural networks

Flexible accelerator for sparse tensors in convolutional neural networks

Flexible accelerator for sparse tensors (FAST) in machine learning

LI ZONGWANG

Systems and methods for low density parity check data encoding

Systems and methods for low density parity check data decoding

Systems and methods for quasi-cyclic LDPC code production and decoding

VARNICA NEDELJKO

Optimizing error floor performance of finite-precision layered decoders of low-density parity-check (LDPC) codes

Optimizing error floor performance of finite-precision layered decoders of low-density parity-check (LDPC) codes

HAN YANG

Selectively strengthening and weakening check-node messages in error-correction decoders

GRAEF NILS

Error-floor mitigation of codes using write verification

SANDISK TECHNOLOGIES LLC

Bad page and bad block management in memory

YANG SHAOHUA

Systems and methods for data detection including dynamic scaling

DECLERCQ DAVID

Decoding method and apparatus for non-binary, low-density, parity check codes

Reconfigurable two's-complement and sign-magnitude converter