Inventor

GOPALAKRISHNAN KAILASH

US77 patents

⚠️ This page may combine multiple inventors who share the name “GOPALAKRISHNAN KAILASH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GOPALAKRISHNAN KAILASH

IBM

Rectifying element for a crosspoint based memory array architecture

Ambipolar synaptic devices

Use of a symmetric resistive memory material as a diode to drive symmetric or asymmetric resistive memory

Electronically scannable multiplexing device

Method and structure for increasing effective transistor width in memory arrays with dual bitlines

Enhanced low precision binary floating-point formatting

Tightly coupled processor arrays using coarse grained reconfigurable architecture with iteration level commits

Ambipolar synaptic devices

Ambipolar synaptic devices

Memory and logic devices using electronically scannable multiplexing devices

Loop management in multi-processor dataflow architecture

Pre-computation slice merging for prefetching in a computer processor

Neural network circuitry having floating point format with asymmetric range

Electronically scannable multiplexing device

Mixed precision capable hardware for tuning a machine learning model

System-aware selective quantization for performance optimized distributed deep learning

Robust gradient weight compression schemes for deep learning applications

Hybrid floating point representation for deep learning acceleration

Very low precision floating point representation for deep learning acceleration

Ambipolar synaptic devices

Junction field-effect floating gate memory switch with thin tunnel insulator

Junction field-effect quantum dot memory switch

Four-bit training for machine learning

Matrix multiplication on a systolic array

Matrix multiplication on a systolic array

Sparse systolic array design

Tightly coupled processor arrays using coarse grained reconfigurable architecture with iteration level commits

Ambipolar synaptic devices

Ambipolar synaptic devices

Electronically scannable multiplexing device

Enhanced low precision binary floating-point formatting

Hybrid floating point representation for deep learning acceleration

Statistics-aware weight quantization

Binary floating-point multiply and scale operation for compute-intensive numerical applications and apparatuses

Semiconductor device with programmable response

Semi-conductor device with programmable response

Semi-conductor device with programmable response

Electrolytic device based on a solution-processed electrolyte

Reduced precision based programmable and SIMD dataflow architecture

Padding input data for artificial intelligence accelerators

GOPALAKRISHNAN KAILASH

Crosspoint array and method of use with a crosspoint array having crossbar elements having a solid electrolyte material used as a rectifier with a symmetric or substantially symmetric resistive memory

Method of forming multi-high-density memory devices and architectures

Rectifying element for a crosspoint based memory array architecture

BETHUNE DONALD S

Low temperature BEOL compatible diode having high voltage margins for use in large arrays of electronic components

Backend of line (BEOL) compatible high current density access device for high density arrays of electronic components

T RAM SEMICONDUCTOR INC

Thyristor circuit and approach for temperature stability

LAM CHUNG H

3D architecture for bipolar memory using bipolar access device

UNIV LELAND STANFORD JUNIOR

Negative differential resistance devices and approaches therefor

WICKRAMASINGHE HEMANTHA KUMAR

Electronically scannable multiplexing device

BURR GEOFFREY W

Non-volatile memory crosspoint repair