Inventor
OGIHARA MASAKI
JP31 patents
⚠️ This page may combine multiple inventors who share the name “OGIHARA MASAKI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TOSHIBA KK
28 patentsUS5726475AMar 10, 1998
Semiconductor device having different impurity concentration wells
TOSHIBA KK29 citations92
US5712827AJan 27, 1998
Dynamic type memory
TOSHIBA KK20 citations92
US5586078ADec 17, 1996
Dynamic type memory
TOSHIBA KK49 citations92
US5475646ADec 12, 1995
Screening circuitry for a dynamic random access memory
TOSHIBA KK32 citations92
US5386386AJan 31, 1995
Redundancy circuit having a spare memory block replacing defective memory cells in different blocks
TOSHIBA KK30 citations92
US5335205AAug 2, 1994
DRAM using word line potential control circuitcircuit
TOSHIBA KK27 citations92
US5272672ADec 21, 1993
Semiconductor memory device having redundant circuit
TOSHIBA KK23 citations92
US5079613AJan 7, 1992
Semiconductor device having different impurity concentration wells
TOSHIBA KK37 citations92
US4980863ADec 25, 1990
Semiconductor memory device having switching circuit for coupling together two pairs of bit lines
TOSHIBA KK29 citations92
US6141288AOct 31, 2000
Semiconductor memory device allowing change of refresh mode and address switching method therewith
TOSHIBA KK12 citations82
US5633827AMay 27, 1997
Semiconductor integrated circuit device allowing change of product specification and chip screening method therewith
TOSHIBA KK10 citations82
US5559748ASep 24, 1996
Semiconductor integrated circuit allowing change of product specification and chip screening method therewith
TOSHIBA KK15 citations82
US5374838ADec 20, 1994
Semiconductor device having different impurity concentration wells
TOSHIBA KK19 citations82
US5260226ANov 9, 1993
Semiconductor device having different impurity concentration wells
TOSHIBA KK16 citations82
US5812481ASep 22, 1998
Semiconductor integrated circuit device allowing change of product specification and chip screening method therewith
TOSHIBA KK9 citations74
US5619162AApr 8, 1997
Dram using word line potential circuit control
TOSHIBA KK5 citations74
US5550504AAug 27, 1996
Dram using word line potential control circuit
TOSHIBA KK13 citations74
US5420816AMay 30, 1995
Semiconductor memory apparatus with configured word lines to reduce noise
TOSHIBA KK18 citations74
US5371710ADec 6, 1994
Semiconductor memory device having test mode
TOSHIBA KK8 citations74
US5303193AApr 12, 1994
Semiconductor device
TOSHIBA KK19 citations74
US5238860AAug 24, 1993
Semiconductor device having different impurity concentration wells
TOSHIBA KK19 citations74
US5144388ASep 1, 1992
Semiconductor device having a plurality of fets formed in an element area
TOSHIBA KK18 citations74
US4931992AJun 5, 1990
Semiconductor memory having barrier transistors connected between sense and restore circuits
TOSHIBA KK10 citations74
US4829483AMay 9, 1989
Method and apparatus for selecting disconnecting first and second bit line pairs for sensing data output from a drain at a high speed
TOSHIBA KK13 citations74
US5642326AJun 24, 1997
Dynamic memory
TOSHIBA KK9 citations73
US5111275AMay 5, 1992
Multicell semiconductor memory device
TOSHIBA KK2 citations63
USRE37427EOct 30, 2001
Dynamic type memory
TOSHIBA KK2 citations62
US5970015AOct 19, 1999
Semiconductor integrated circuit device allowing change of product specification and chip screening method therewith
TOSHIBA KK0 citations52
HITACHI LTD
3 patentsUS7182257B2Feb 27, 2007
Distribution management method and system
HITACHI LTD18 citations91
US6880753B2Apr 19, 2005
Distribution management method and system
HITACHI LTD20 citations91
US7190254B2Mar 13, 2007
Emigrant reception system, emigrant gate system, emigrant control system, emigrant control method, passport applicant information management method, layout of emigrant gate, immigrant reception system, immigrant gate system, immigrant control system, immigrant control method, layout of immigrant gate system, and passport
HITACHI LTD10 citations83