Inventor

ZBICIAK JOSEPH R M

US23 patents

⚠️ This page may combine multiple inventors who share the name “ZBICIAK JOSEPH R M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ZBICIAK JOSEPH R M

TEXAS INSTRUMENTS INC

Secure master and secure guest endpoint security firewall

Secure master and secure guest endpoint security firewall

Multicore bus architecture with non-blocking high performance transaction credit system

Multicore bus architecture with non-blocking high performance transaction credit system

Secure master and secure guest endpoint security firewall

Slot/sub-slot prefetch architecture for multiple memory requestors

Multicore bus architecture with non-blocking high performance transaction credit system

Slot/sub-slot prefetch architecture for multiple memory requestors

Slot/sub-slot prefetch architecture for multiple memory requestors

Slot/sub-slot prefetch architecture for multiple memory requestors

Distributed power control for controlling power consumption based on detected activity of logic blocks

ZBICIAK JOSEPH R M

Flexible memory protection and translation unit

Device security features supporting a distributed shared memory system

Memory management unit that applies rules based on privilege identifier

Dedicated memory window for emulation address

CHIRCA KAI

Speculation-aware memory controller arbiter

Slot/sub-slot prefetch architecture for multiple memory requestors

Prefetch stream filter with FIFO allocation and stream direction prediction

PIERSON MATTHEW D

Prefetcher with arbitrary downstream prefetch cancelation

Double-buffered data storage to reduce prefetch generation stalls

BALASUBRAMANIAN DHEERA

Programmable mapping of external requestors to privilege classes for access protection

ANDERSON TIMOTHY DAVID

Entry/exit control to/from a low power state in a complex multi level memory system

ANDERSON TIMOTHY D

Prefetch address hit prediction to reduce memory access latency