Inventor

KIRYU NAOKI

JP18 patents

⚠️ This page may combine multiple inventors who share the name “KIRYU NAOKI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KIRYU NAOKI

TOSHIBA KK

Systems and methods for providing output data in an LBIST system having a limited number of output ports

System and method for burn-in test control

Systems and methods for circuit testing

Systems and methods for circuit testing using LBIST

Systems and methods for identifying errors in LBIST testing

Systems and methods for diagnosing rate dependent errors using LBIST

Systems and methods for LBIST testing using multiple functional subphases

Programmable scan shift speed control for LBIST

Systems and methods for LBIST testing using isolatable scan chains

Systems and methods for improved fault coverage of LBIST testing

Multi-test method for using compare MISR

IBM

Method and apparatus for accelerating through-the pins LBIST simulation

Circuit apparatus and method for testing integrated circuits using weighted pseudo-random test patterns

Method and apparatus for testing a ring of non-scan latches with logic built-in self-test

Apparatus for accelerating through-the-pins LBIST simulation

Method and apparatus for testing a ring of non-scan latches with logic built-in self-test

URAKAWA YUKIHIRO

Semiconductor device, semiconductor package and memory repair method

FUKUI AKIHIKO

Data transfer circuit